diff options
author | Andreas Färber <afaerber@suse.de> | 2013-01-27 03:32:02 +0000 |
---|---|---|
committer | Alexander Graf <agraf@suse.de> | 2013-02-01 01:52:03 +0100 |
commit | 476b6d1619446b9c8f72d7523985ba4fdfeaa405 (patch) | |
tree | 440254a554790499fbcf0362bb7acab3f07eb03d /target-ppc/translate.c | |
parent | cca48a93a9a6c1c95ace89b299d3f9f47adadd6d (diff) |
target-ppc: Fix build for PPC_DEBUG_DISAS
In r5949 / 76db3ba44ee8db671f804755f13b016eefd13288 (target-ppc: memory
load/store rework) variable little_endian was replaced with ctx.le_mode.
Update the debug code.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r-- | target-ppc/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index d96d1eddb7..2ac5794add 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -9689,7 +9689,7 @@ static inline void gen_intermediate_code_internal(CPUPPCState *env, } LOG_DISAS("translate opcode %08x (%02x %02x %02x) (%s)\n", ctx.opcode, opc1(ctx.opcode), opc2(ctx.opcode), - opc3(ctx.opcode), little_endian ? "little" : "big"); + opc3(ctx.opcode), ctx.le_mode ? "little" : "big"); if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { tcg_gen_debug_insn_start(ctx.nip); } |