diff options
author | Tom Musta <tommusta@gmail.com> | 2014-02-12 15:23:11 -0600 |
---|---|---|
committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:57 +0100 |
commit | b41da4ebb2658c4abaaab01e64b9d0bb67dba003 (patch) | |
tree | ecb761c059f83eafd3d08bcd4d9268ed4d6ac117 /target-ppc/translate.c | |
parent | 2fdf78e649b81a14e2c65770fdb0ac3e656a35c5 (diff) |
target-ppc: Altivec 2.07: Quadword Addition and Subtracation
This patch adds the Vector Quadword Addition and Subtraction instructions
introduced in Power ISA Version 2.07:
- Vector Add Unsigned Quadword Modulo (vadduqm)
- Vector Add & Write Carry Unsigned Quadword (vaddcuq)
- Vector Add Extended Unsigned Quadword (vaddeuqm)
- Vector Add Extended & Write Carry Unsigned Quadword (vaddecuq)
- Vector Subtract Unsigned Quadword Modulo (vsubuqm)
- Vector Subtract & Write Carry Unsigned Quadword (vsubcuq)
- Vector Subtract Extended Unsigned Quadword (vsubeuqm)
- Vector Subtract Extended & Write Carry Unsigned Quadword (vsubecuq)
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r-- | target-ppc/translate.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 3d38a25cc4..c4d7f0f55a 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7043,6 +7043,18 @@ GEN_VXFORM_ENV(vsubuws, 0, 26); GEN_VXFORM_ENV(vsubsbs, 0, 28); GEN_VXFORM_ENV(vsubshs, 0, 29); GEN_VXFORM_ENV(vsubsws, 0, 30); +GEN_VXFORM(vadduqm, 0, 4); +GEN_VXFORM(vaddcuq, 0, 5); +GEN_VXFORM3(vaddeuqm, 30, 0); +GEN_VXFORM3(vaddecuq, 30, 0); +GEN_VXFORM_DUAL(vaddeuqm, PPC_NONE, PPC2_ALTIVEC_207, \ + vaddecuq, PPC_NONE, PPC2_ALTIVEC_207) +GEN_VXFORM(vsubuqm, 0, 20); +GEN_VXFORM(vsubcuq, 0, 21); +GEN_VXFORM3(vsubeuqm, 31, 0); +GEN_VXFORM3(vsubecuq, 31, 0); +GEN_VXFORM_DUAL(vsubeuqm, PPC_NONE, PPC2_ALTIVEC_207, \ + vsubecuq, PPC_NONE, PPC2_ALTIVEC_207) GEN_VXFORM(vrlb, 2, 0); GEN_VXFORM(vrlh, 2, 1); GEN_VXFORM(vrlw, 2, 2); @@ -10488,6 +10500,12 @@ GEN_VXFORM(vsubuws, 0, 26), GEN_VXFORM(vsubsbs, 0, 28), GEN_VXFORM(vsubshs, 0, 29), GEN_VXFORM(vsubsws, 0, 30), +GEN_VXFORM_207(vadduqm, 0, 4), +GEN_VXFORM_207(vaddcuq, 0, 5), +GEN_VXFORM_DUAL(vaddeuqm, vaddecuq, 30, 0xFF, PPC_NONE, PPC2_ALTIVEC_207), +GEN_VXFORM_207(vsubuqm, 0, 20), +GEN_VXFORM_207(vsubcuq, 0, 21), +GEN_VXFORM_DUAL(vsubeuqm, vsubecuq, 31, 0xFF, PPC_NONE, PPC2_ALTIVEC_207), GEN_VXFORM(vrlb, 2, 0), GEN_VXFORM(vrlh, 2, 1), GEN_VXFORM(vrlw, 2, 2), |