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| author | Tom Musta <tommusta@gmail.com> | 2013-11-01 08:21:15 -0500 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2013-12-20 01:57:56 +0100 |
| commit | 9231ba9ee9c7d68364a28657109d2f7c32e12971 (patch) | |
| tree | 8f0b6254d2336348fe5efc0f8dc3cc176a61eb67 /target-ppc/translate.c | |
| parent | 897e61d13777a5995d3cd12fcaf44eb4bbb5439c (diff) | |
Add stxsdx
This patch adds the Store VSX Scalar Doubleword Indexed (stxsdx)
instruction.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 62e74a65a4..559fc152d3 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7077,6 +7077,20 @@ static void gen_lxvw4x(DisasContext *ctx) tcg_temp_free(tmp); } +static void gen_stxsdx(DisasContext *ctx) +{ + TCGv EA; + if (unlikely(!ctx->vsx_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VSXU); + return; + } + gen_set_access_type(ctx, ACCESS_INT); + EA = tcg_temp_new(); + gen_addr_reg_index(ctx, EA); + gen_qemu_st64(ctx, cpu_vsrh(xS(ctx->opcode)), EA); + tcg_temp_free(EA); +} + static void gen_stxvd2x(DisasContext *ctx) { TCGv EA; @@ -9565,6 +9579,7 @@ GEN_HANDLER_E(lxvd2x, 0x1F, 0x0C, 0x1A, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(lxvdsx, 0x1F, 0x0C, 0x0A, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2_VSX), +GEN_HANDLER_E(stxsdx, 0x1F, 0xC, 0x16, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX), #undef GEN_XX3FORM_DM |