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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-24 06:50:21 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-24 06:50:21 +0000
commit35cdaad645d7a97e67690582feb1fc3a050c92ad (patch)
tree9a628a9108b9be0e9ea3a56f8b4b85b9bfcbceb1 /target-ppc/op_template.h
parentc294fc587a52f4991b1dcbb328b5a9d09f8c8e2e (diff)
Code provision for new PowerPC embedded target support with:
- 1 kB page size - 64 bits GPR - 64 bits physical address space - SPE extension support. Change TARGET_PPCSPE into TARGET_PPCEMB git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2718 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op_template.h')
-rw-r--r--target-ppc/op_template.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-ppc/op_template.h b/target-ppc/op_template.h
index bcef1a5cb7..4487a879c7 100644
--- a/target-ppc/op_template.h
+++ b/target-ppc/op_template.h
@@ -57,7 +57,7 @@ void OPPROTO glue(op_store_T2_gpr_gpr, REG) (void)
}
#endif
-#if defined(TARGET_PPCSPE)
+#if defined(TARGET_PPCEMB)
void OPPROTO glue(op_load_gpr64_T0_gpr, REG) (void)
{
T0_64 = regs->gpr[REG];
@@ -97,7 +97,7 @@ void OPPROTO glue(op_store_T2_gpr64_gpr, REG) (void)
RETURN();
}
#endif
-#endif /* defined(TARGET_PPCSPE) */
+#endif /* defined(TARGET_PPCEMB) */
#if REG <= 7
/* Condition register moves */