diff options
author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-12 01:56:18 +0000 |
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committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-12 01:56:18 +0000 |
commit | 3cd7d1ddbba67a79854ea258cdf3a07eb0ad5136 (patch) | |
tree | 5dee929d68c3c96baae508887156292d975cbe82 /target-ppc/op_template.h | |
parent | a73666f6564e17adcae2908f7b52d42de2ff5211 (diff) |
Allow use of SPE extension by all PowerPC targets,
adding gprh registers to store GPR MSBs when GPRs are 32 bits.
Remove not-needed-anymore ppcemb-linux-user target.
Keep ppcemb-softmmu target, which provides 1kB pages support
and 36 bits physical address space.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3628 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op_template.h')
-rw-r--r-- | target-ppc/op_template.h | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/target-ppc/op_template.h b/target-ppc/op_template.h index 51f9b3681b..26a066245b 100644 --- a/target-ppc/op_template.h +++ b/target-ppc/op_template.h @@ -58,23 +58,23 @@ void OPPROTO glue(op_store_T2_gpr_gpr, REG) (void) #endif /* General purpose registers containing vector operands moves */ -#if defined(TARGET_PPCEMB) +#if TARGET_GPR_BITS < 64 void OPPROTO glue(op_load_gpr64_T0_gpr, REG) (void) { - T0_64 = env->gpr[REG]; + T0_64 = (uint64_t)env->gpr[REG] | ((uint64_t)env->gprh[REG] << 32); RETURN(); } void OPPROTO glue(op_load_gpr64_T1_gpr, REG) (void) { - T1_64 = env->gpr[REG]; + T1_64 = (uint64_t)env->gpr[REG] | ((uint64_t)env->gprh[REG] << 32); RETURN(); } #if 0 // unused void OPPROTO glue(op_load_gpr64_T2_gpr, REG) (void) { - T2_64 = env->gpr[REG]; + T2_64 = (uint64_t)env->gpr[REG] | ((uint64_t)env->gprh[REG] << 32); RETURN(); } #endif @@ -82,12 +82,14 @@ void OPPROTO glue(op_load_gpr64_T2_gpr, REG) (void) void OPPROTO glue(op_store_T0_gpr64_gpr, REG) (void) { env->gpr[REG] = T0_64; + env->gprh[REG] = T0_64 >> 32; RETURN(); } void OPPROTO glue(op_store_T1_gpr64_gpr, REG) (void) { env->gpr[REG] = T1_64; + env->gprh[REG] = T1_64 >> 32; RETURN(); } @@ -95,10 +97,11 @@ void OPPROTO glue(op_store_T1_gpr64_gpr, REG) (void) void OPPROTO glue(op_store_T2_gpr64_gpr, REG) (void) { env->gpr[REG] = T2_64; + env->gprh[REG] = T2_64 >> 32; RETURN(); } #endif -#endif /* defined(TARGET_PPCEMB) */ +#endif /* TARGET_GPR_BITS < 64 */ /* Altivec registers moves */ void OPPROTO glue(op_load_avr_A0_avr, REG) (void) |