diff options
| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-12 01:56:18 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-12 01:56:18 +0000 |
| commit | 3cd7d1ddbba67a79854ea258cdf3a07eb0ad5136 (patch) | |
| tree | 5dee929d68c3c96baae508887156292d975cbe82 /target-ppc/op_mem.h | |
| parent | a73666f6564e17adcae2908f7b52d42de2ff5211 (diff) | |
Allow use of SPE extension by all PowerPC targets,
adding gprh registers to store GPR MSBs when GPRs are 32 bits.
Remove not-needed-anymore ppcemb-linux-user target.
Keep ppcemb-softmmu target, which provides 1kB pages support
and 36 bits physical address space.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3628 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op_mem.h')
| -rw-r--r-- | target-ppc/op_mem.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/target-ppc/op_mem.h b/target-ppc/op_mem.h index 560a0edaef..971cc18381 100644 --- a/target-ppc/op_mem.h +++ b/target-ppc/op_mem.h @@ -37,7 +37,6 @@ static always_inline uint32_t glue(ld32r, MEMSUFFIX) (target_ulong EA) ((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24); } -#if defined(TARGET_PPC64) || defined(TARGET_PPCEMB) static always_inline uint64_t glue(ld64r, MEMSUFFIX) (target_ulong EA) { uint64_t tmp = glue(ldq, MEMSUFFIX)(EA); @@ -50,7 +49,6 @@ static always_inline uint64_t glue(ld64r, MEMSUFFIX) (target_ulong EA) ((tmp & 0x000000000000FF00ULL) << 40) | ((tmp & 0x00000000000000FFULL) << 54); } -#endif #if defined(TARGET_PPC64) static always_inline int64_t glue(ldsl, MEMSUFFIX) (target_ulong EA) @@ -81,7 +79,6 @@ static always_inline void glue(st32r, MEMSUFFIX) (target_ulong EA, glue(stl, MEMSUFFIX)(EA, tmp); } -#if defined(TARGET_PPC64) || defined(TARGET_PPCEMB) static always_inline void glue(st64r, MEMSUFFIX) (target_ulong EA, uint64_t data) { @@ -95,7 +92,6 @@ static always_inline void glue(st64r, MEMSUFFIX) (target_ulong EA, ((data & 0x00000000000000FFULL) << 56); glue(stq, MEMSUFFIX)(EA, tmp); } -#endif /*** Integer load ***/ #define PPC_LD_OP(name, op) \ @@ -1123,7 +1119,6 @@ void OPPROTO glue(op_vr_stvx_le_64, MEMSUFFIX) (void) #undef VR_DWORD0 #undef VR_DWORD1 -#if defined(TARGET_PPCEMB) /* SPE extension */ #define _PPC_SPE_LD_OP(name, op) \ void OPPROTO glue(glue(op_spe_l, name), MEMSUFFIX) (void) \ @@ -1385,6 +1380,5 @@ uint64_t glue(spe_lwhsplat_le, MEMSUFFIX) (target_ulong EA) return ret; } PPC_SPE_LD_OP(whsplat_le, spe_lwhsplat_le); -#endif /* defined(TARGET_PPCEMB) */ #undef MEMSUFFIX |