target-ppc: convert icbi instruction to TCG

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5827 c046a42c-6fe2-441c-8c8c-71466251a162

1 files changed, 0 insertions, 31 deletions

diff --git a/target-ppc/op_helper_mem.h b/target-ppc/op_helper_mem.h
index 2c3d5fa075..9663110693 100644
--- a/target-ppc/op_helper_mem.h
+++ b/target-ppc/op_helper_mem.h
@@ -92,37 +92,6 @@ void glue(do_stsw_64, MEMSUFFIX) (int src)
 }
 #endif
 
-/* Instruction cache invalidation helper */
-void glue(do_icbi, MEMSUFFIX) (void)
-{
-    uint32_t tmp;
-    /* Invalidate one cache line :
-     * PowerPC specification says this is to be treated like a load
-     * (not a fetch) by the MMU. To be sure it will be so,
-     * do the load "by hand".
-     */
-    T0 &= ~(env->icache_line_size - 1);
-    tmp = glue(ldl, MEMSUFFIX)((uint32_t)T0);
-    tb_invalidate_page_range((uint32_t)T0,
-                             (uint32_t)(T0 + env->icache_line_size));
-}
-
-#if defined(TARGET_PPC64)
-void glue(do_icbi_64, MEMSUFFIX) (void)
-{
-    uint64_t tmp;
-    /* Invalidate one cache line :
-     * PowerPC specification says this is to be treated like a load
-     * (not a fetch) by the MMU. To be sure it will be so,
-     * do the load "by hand".
-     */
-    T0 &= ~(env->icache_line_size - 1);
-    tmp = glue(ldq, MEMSUFFIX)((uint64_t)T0);
-    tb_invalidate_page_range((uint64_t)T0,
-                             (uint64_t)(T0 + env->icache_line_size));
-}
-#endif
-
 /* PowerPC 601 specific instructions (POWER bridge) */
 // XXX: to be tested
 void glue(do_POWER_lscbx, MEMSUFFIX) (int dest, int ra, int rb)