diff options
author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-22 10:09:17 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-22 10:09:17 +0000 |
commit | 64adab3fcbab7cd3a1d7fff327640f8128de6e86 (patch) | |
tree | 776eaefe12bc2fdfcd193a62c7de34697481521b /target-ppc/op_helper.c | |
parent | e2eb279809e0e2e158d65dd7b448c70bd773f6b7 (diff) |
target-ppc: convert exceptions generation to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5772 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op_helper.c')
-rw-r--r-- | target-ppc/op_helper.c | 48 |
1 files changed, 22 insertions, 26 deletions
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index daaceecf07..4f7521bac7 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -46,21 +46,17 @@ /*****************************************************************************/ /* Exceptions processing helpers */ -void do_raise_exception_err (uint32_t exception, int error_code) +void helper_raise_exception_err (uint32_t exception, uint32_t error_code) { -#if 0 - printf("Raise exception %3x code : %d\n", exception, error_code); -#endif - env->exception_index = exception; - env->error_code = error_code; - cpu_loop_exit(); + raise_exception_err(env, exception, error_code); } -void do_raise_exception (uint32_t exception) +void helper_raise_debug (void) { - do_raise_exception_err(exception, 0); + raise_exception(env, EXCP_DEBUG); } + /*****************************************************************************/ /* Registers load and stores */ target_ulong helper_load_cr (void) @@ -430,7 +426,7 @@ static always_inline uint64_t fload_invalid_op_excp (int op) /* Update the floating-point enabled exception summary */ env->fpscr |= 1 << FPSCR_FEX; if (msr_fe0 != 0 || msr_fe1 != 0) - do_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_FP | op); + raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_FP | op); } return ret; } @@ -445,8 +441,8 @@ static always_inline uint64_t float_zero_divide_excp (uint64_t arg1, uint64_t ar /* Update the floating-point enabled exception summary */ env->fpscr |= 1 << FPSCR_FEX; if (msr_fe0 != 0 || msr_fe1 != 0) { - do_raise_exception_err(POWERPC_EXCP_PROGRAM, - POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX); + raise_exception_err(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX); } } else { /* Set the result to infinity */ @@ -686,7 +682,7 @@ void helper_float_check_status (void) (env->error_code & POWERPC_EXCP_FP)) { /* Differred floating-point exception after target FPR update */ if (msr_fe0 != 0 || msr_fe1 != 0) - do_raise_exception_err(env->exception_index, env->error_code); + raise_exception_err(env, env->exception_index, env->error_code); } else if (env->fp_status.float_exception_flags & float_flag_overflow) { float_overflow_excp(); } else if (env->fp_status.float_exception_flags & float_flag_underflow) { @@ -699,7 +695,7 @@ void helper_float_check_status (void) (env->error_code & POWERPC_EXCP_FP)) { /* Differred floating-point exception after target FPR update */ if (msr_fe0 != 0 || msr_fe1 != 0) - do_raise_exception_err(env->exception_index, env->error_code); + raise_exception_err(env, env->exception_index, env->error_code); } RETURN(); #endif @@ -1356,7 +1352,7 @@ void do_store_msr (void) T0 = hreg_store_msr(env, T0, 0); if (T0 != 0) { env->interrupt_request |= CPU_INTERRUPT_EXITTB; - do_raise_exception(T0); + raise_exception(env, T0); } } @@ -1417,7 +1413,7 @@ void do_tw (int flags) ((int32_t)T0 == (int32_t)T1 && (flags & 0x04)) || ((uint32_t)T0 < (uint32_t)T1 && (flags & 0x02)) || ((uint32_t)T0 > (uint32_t)T1 && (flags & 0x01))))) { - do_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); + raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); } } @@ -1429,7 +1425,7 @@ void do_td (int flags) ((int64_t)T0 == (int64_t)T1 && (flags & 0x04)) || ((uint64_t)T0 < (uint64_t)T1 && (flags & 0x02)) || ((uint64_t)T0 > (uint64_t)T1 && (flags & 0x01))))) - do_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); + raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); } #endif @@ -1670,14 +1666,14 @@ void do_load_dcr (void) if (loglevel != 0) { fprintf(logfile, "No DCR environment\n"); } - do_raise_exception_err(POWERPC_EXCP_PROGRAM, - POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); + raise_exception_err(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); } else if (unlikely(ppc_dcr_read(env->dcr_env, T0, &val) != 0)) { if (loglevel != 0) { fprintf(logfile, "DCR read error %d %03x\n", (int)T0, (int)T0); } - do_raise_exception_err(POWERPC_EXCP_PROGRAM, - POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); + raise_exception_err(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); } else { T0 = val; } @@ -1689,14 +1685,14 @@ void do_store_dcr (void) if (loglevel != 0) { fprintf(logfile, "No DCR environment\n"); } - do_raise_exception_err(POWERPC_EXCP_PROGRAM, - POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); + raise_exception_err(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); } else if (unlikely(ppc_dcr_write(env->dcr_env, T0, T1) != 0)) { if (loglevel != 0) { fprintf(logfile, "DCR write error %d %03x\n", (int)T0, (int)T0); } - do_raise_exception_err(POWERPC_EXCP_PROGRAM, - POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); + raise_exception_err(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); } } @@ -2454,7 +2450,7 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) cpu_restore_state(tb, env, pc, NULL); } } - do_raise_exception_err(env->exception_index, env->error_code); + raise_exception_err(env, env->exception_index, env->error_code); } env = saved_env; } |