diff options
author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-14 18:40:58 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-14 18:40:58 +0000 |
commit | 6e35d5243c893200e958ef1b6f25519b62cd7d76 (patch) | |
tree | ee98a0a71bdfb193eccaacfa41258cf4011fb2a0 /target-ppc/op_helper.c | |
parent | 7889270acbee87513172b507bb447e7cc50258e7 (diff) |
target-ppc: fix mtfsb0 and mtfsb1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6032 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op_helper.c')
-rw-r--r-- | target-ppc/op_helper.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index cd88bb6075..a46c00c9d7 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -843,6 +843,24 @@ static always_inline void fpscr_set_rounding_mode (void) set_float_rounding_mode(rnd_type, &env->fp_status); } +void helper_fpscr_clrbit (uint32_t bit) +{ + int prev; + + prev = (env->fpscr >> bit) & 1; + env->fpscr &= ~(1 << bit); + if (prev == 1) { + switch (bit) { + case FPSCR_RN1: + case FPSCR_RN: + fpscr_set_rounding_mode(); + break; + default: + break; + } + } +} + void helper_fpscr_setbit (uint32_t bit) { int prev; |