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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-05 22:06:02 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-05 22:06:02 +0000
commit12de9a396acbc95e25c5d60ed097cc55777eaaed (patch)
tree93029d051b9adb4f250c2be5b2ba3bb86095a463 /target-ppc/op.c
parent5bfb56b264d18be57f16c519464fc1919db44372 (diff)
Full implementation of PowerPC 64 MMU, just missing support for 1 TB
memory segments. Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead. Make SLB area size implementation dependant. Improve TLB & SLB search debug traces. Temporary hack to make PowerPC 970 boot from ROM instead of RAM. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3335 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op.c')
-rw-r--r--target-ppc/op.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/target-ppc/op.c b/target-ppc/op.c
index 2c02350315..2dc058efb1 100644
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -317,6 +317,20 @@ void OPPROTO op_store_sr (void)
RETURN();
}
+#if defined(TARGET_PPC64)
+void OPPROTO op_load_slb (void)
+{
+ T0 = ppc_load_slb(env, T1);
+ RETURN();
+}
+
+void OPPROTO op_store_slb (void)
+{
+ ppc_store_slb(env, T1, T0);
+ RETURN();
+}
+#endif /* defined(TARGET_PPC64) */
+
void OPPROTO op_load_sdr1 (void)
{
T0 = env->sdr1;