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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-09-26 23:54:22 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-09-26 23:54:22 +0000
commita750fc0b9184a520d00d9e949160a0c6d3232ecd (patch)
tree681734fa2531d1cb27efc89d2f4d7397f1f8eaee /target-ppc/op.c
parent08fa4bab833f834e1511853dd2331fa3d6d5d469 (diff)
Great rework and cleanups to ease PowerPC implementations definitions.
* cleanup cpu.h, removing definitions used only in translate.c/translate_init.c * add new flags to define instructions sets more precisely * various changes in MMU models definitions * add definitions for PowerPC 440/460 support (insns and SPRs). * add definitions for PowerPC 401/403 and 620 input pins model * Fix definitions for most PowerPC 401, 403, 405, 440, 601, 602, 603 and 7x0 * Preliminary support for PowerPC 74xx (aka G4) without altivec. * Code provision for other PowerPC support (7x5, 970, ...). * New SPR and PVR defined, from PowerPC 2.04 specification and other sources * Misc code bugs, error messages and styles fixes. * Update status files for PowerPC cores support. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3244 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op.c')
-rw-r--r--target-ppc/op.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/op.c b/target-ppc/op.c
index 593539bbf7..93c463e30f 100644
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -2319,7 +2319,6 @@ void OPPROTO op_405_check_satu (void)
RETURN();
}
-#if !defined(CONFIG_USER_ONLY)
void OPPROTO op_load_dcr (void)
{
do_load_dcr();
@@ -2332,6 +2331,7 @@ void OPPROTO op_store_dcr (void)
RETURN();
}
+#if !defined(CONFIG_USER_ONLY)
/* Return from critical interrupt :
* same as rfi, except nip & MSR are loaded from SRR2/3 instead of SRR0/1
*/