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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-24 06:44:14 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-24 06:44:14 +0000
commitc294fc587a52f4991b1dcbb328b5a9d09f8c8e2e (patch)
tree2d5c28865fd8aa9e511024802a3e2d1fd020c792 /target-ppc/op.c
parent9c02f1a2e607b7be71f2dba1cafc096dd3c2dda9 (diff)
Improve PowerPC 405 MMU model / share more code for other embedded targets
support. Fix PowerPC 405 MSR mask. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2717 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op.c')
-rw-r--r--target-ppc/op.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target-ppc/op.c b/target-ppc/op.c
index b8498f1827..f18e7f3f91 100644
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -2459,6 +2459,12 @@ void OPPROTO op_store_40x_dbcr0 (void)
store_40x_dbcr0(env, T0);
}
+void OPPROTO op_store_40x_sler (void)
+{
+ store_40x_sler(env, T0);
+ RETURN();
+}
+
void OPPROTO op_store_booke_tcr (void)
{
store_booke_tcr(env, T0);