diff options
| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2014-06-04 22:50:55 +1000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-06-16 13:24:44 +0200 |
| commit | d1a721ab816d1b954c0988aafdec4e109b953a9f (patch) | |
| tree | dcb64980cc93a87f9b3319f1321f79b7302b9b5f /target-ppc/mmu-hash64.h | |
| parent | a242881405811ec6e6134452311f1cd1896c8ada (diff) | |
target-ppc: Add POWER8's TIR SPR
This adds TIR (Thread Identification Register) SPR first defined for server
CPUs in PowerISA 2.07.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/mmu-hash64.h')
0 files changed, 0 insertions, 0 deletions