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authorDavid Gibson <david@gibson.dropbear.id.au>2013-03-12 00:31:12 +0000
committerAlexander Graf <agraf@suse.de>2013-03-22 15:28:47 +0100
commit25de24ab838be5801d5cc13b8a347922a3770fa5 (patch)
tree9a17bbc7aadc83308487299126400299c02ea61b /target-ppc/mmu-hash64.h
parent629bd516fda67c95ba1c7d1393bacb9e68ea0712 (diff)
target-ppc: Disentangle hash mmu paths for cpu_ppc_handle_mmu_fault
cpu_ppc_handle_mmu_fault() calls get_physical_address() (whose behaviour depends on MMU type) then, if that fails, issues an appropriate exception - which again has a number of dependencies on MMU type. This patch starts converting cpu_ppc_handle_mmu_fault() to have a single switch on MMU type, calling MMU specific fault handler functions which deal with both translation and exception delivery appropriately for the MMU type. We convert 32-bit and 64-bit hash MMUs to this new model, but the existing code is left in place for other MMU types for now. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/mmu-hash64.h')
-rw-r--r--target-ppc/mmu-hash64.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index d8eb8ded8a..3a53e61673 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -8,6 +8,8 @@ void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs);
int ppc_hash64_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
target_ulong eaddr, int rw, int access_type);
+int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
+ int mmu_idx);
#endif
#endif /* CONFIG_USER_ONLY */