diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-10-21 11:28:46 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-10-21 11:28:46 +0000 |
| commit | 3d7b417e13152587df587fe58789740c3ef7abb9 (patch) | |
| tree | 824bf571e3bad076986e5144f6834ffd032d77f1 /target-ppc/helper.c | |
| parent | d75a0b97e0e9bfcd73dd2ef081ba06e53932b42d (diff) | |
target-ppc: Convert XER accesses to TCG
Define XER bits as a single register and access them individually to
avoid defining 5 32-bit registers (TCG doesn't permit to map 8-bit
registers).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5500 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/helper.c')
| -rw-r--r-- | target-ppc/helper.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c index 1dac1511d4..befedeacc0 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -2124,16 +2124,6 @@ void do_store_sr (CPUPPCState *env, int srnum, target_ulong value) } #endif /* !defined (CONFIG_USER_ONLY) */ -target_ulong ppc_load_xer (CPUPPCState *env) -{ - return hreg_load_xer(env); -} - -void ppc_store_xer (CPUPPCState *env, target_ulong value) -{ - hreg_store_xer(env, value); -} - /* GDBstub can read and write MSR... */ void ppc_store_msr (CPUPPCState *env, target_ulong value) { |