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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-29 13:36:32 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-29 13:36:32 +0000
commitbf1752ef58cd9bd83d21d434f24197c6650bbd9e (patch)
treeb7b9423f974f7feadb63df6c8c896da5c0a67296 /target-ppc/helper.c
parent004efc967ba93b9c3b59aef9e3fc63019fd60244 (diff)
target-ppc: Explain why the whole TLB is flushed on SR write
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6947 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/helper.c')
-rw-r--r--target-ppc/helper.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 80b53ebcba..a0d884ee1e 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2009,6 +2009,8 @@ void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value)
#endif
if (env->sr[srnum] != value) {
env->sr[srnum] = value;
+/* Invalidating 256MB of virtual memory in 4kB pages is way longer than
+ flusing the whole TLB. */
#if !defined(FLUSH_ALL_TLBS) && 0
{
target_ulong page, end;