diff options
| author | Nathan Whitehorn <nwhitehorn@freebsd.org> | 2012-03-09 04:30:41 +0000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2012-03-15 13:12:12 +0100 |
| commit | eb6ea4b22e89d4c6ed510c7cfcd33d15be92733b (patch) | |
| tree | 8ae8a6e85caf0a14813ac9079fb999ead3ab481b /target-ppc/helper.c | |
| parent | 2e06214f22e080be4a8a17b0fae3b4c03b0aa3ea (diff) | |
PPC: Fix large page support in TCG
Fix large page support in TCG. The old code would overwrite the large page
table entry with the fake 4 KB one generated here whenever the ref/change bits
were updated, causing it to point to the wrong area of memory.
Signed-off-by: Nathan Whitehorn <nwhitehorn@freebsd.org>
Acked-by: David Gibson <david@gibson.drobpear.id.au>
[agraf: fix whitespace, braces]
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/helper.c')
| -rw-r--r-- | target-ppc/helper.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c index bd711b6e22..39dcc273e5 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -591,12 +591,6 @@ static inline int _find_pte(CPUPPCState *env, mmu_ctx_t *ctx, int is_64b, int h, pte1 = ldq_phys(env->htab_base + pteg_off + (i * 16) + 8); } - /* We have a TLB that saves 4K pages, so let's - * split a huge page to 4k chunks */ - if (target_page_bits != TARGET_PAGE_BITS) - pte1 |= (ctx->eaddr & (( 1 << target_page_bits ) - 1)) - & TARGET_PAGE_MASK; - r = pte64_check(ctx, pte0, pte1, h, rw, type); LOG_MMU("Load pte from " TARGET_FMT_lx " => " TARGET_FMT_lx " " TARGET_FMT_lx " %d %d %d " TARGET_FMT_lx "\n", @@ -672,6 +666,12 @@ static inline int _find_pte(CPUPPCState *env, mmu_ctx_t *ctx, int is_64b, int h, } } + /* We have a TLB that saves 4K pages, so let's + * split a huge page to 4k chunks */ + if (target_page_bits != TARGET_PAGE_BITS) { + ctx->raddr |= (ctx->eaddr & ((1 << target_page_bits) - 1)) + & TARGET_PAGE_MASK; + } return ret; } |