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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-07 14:41:00 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-07 14:41:00 +0000
commitd26bfc9a1b449db84b80d39ed9d870671a944e5c (patch)
treead28e376a60ef40c6bbca8c6dc19e69f3e7bf1b1 /target-ppc/helper.c
parent7875ed20d7d39496c5e5e6bd85ced79e019bbe65 (diff)
Add MSR bits signification per PowerPC implementation flags (to be continued).
As a side effect, single step and branch step are available again. Remove irrelevant MSR bits definitions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/helper.c')
-rw-r--r--target-ppc/helper.c24
1 files changed, 8 insertions, 16 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index bb39fc05f3..f1fe6806c6 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1183,7 +1183,7 @@ int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
prot = (tlb->prot >> 4) & 0xF;
/* Check the address space */
if (access_type == ACCESS_CODE) {
- if (msr_is != (tlb->attr & 1))
+ if (msr_ir != (tlb->attr & 1))
continue;
ctx->prot = prot;
if (prot & PAGE_EXEC) {
@@ -1192,7 +1192,7 @@ int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
}
ret = -3;
} else {
- if (msr_ds != (tlb->attr & 1))
+ if (msr_dr != (tlb->attr & 1))
continue;
ctx->prot = prot;
if ((!rw && prot & PAGE_READ) || (rw && (prot & PAGE_WRITE))) {
@@ -1964,7 +1964,7 @@ target_ulong do_load_msr (CPUPPCState *env)
((target_ulong)msr_sa << MSR_SA) |
((target_ulong)msr_key << MSR_KEY) |
((target_ulong)msr_pow << MSR_POW) | /* POW / WE */
- ((target_ulong)msr_tlb << MSR_TLB) | /* TLB / TGPE / CE */
+ ((target_ulong)msr_tgpr << MSR_TGPR) | /* TGPR / CE */
((target_ulong)msr_ile << MSR_ILE) |
((target_ulong)msr_ee << MSR_EE) |
((target_ulong)msr_pr << MSR_PR) |
@@ -2000,18 +2000,10 @@ int do_store_msr (CPUPPCState *env, target_ulong value)
fprintf(logfile, "%s: T0 %08lx\n", __func__, value);
}
#endif
- switch (env->excp_model) {
- case POWERPC_EXCP_602:
- case POWERPC_EXCP_603:
- case POWERPC_EXCP_603E:
- case POWERPC_EXCP_G2:
- if (((value >> MSR_TGPR) & 1) != msr_tgpr) {
- /* Swap temporary saved registers with GPRs */
- swap_gpr_tgpr(env);
- }
- break;
- default:
- break;
+ if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&
+ ((value >> MSR_TGPR) & 1) != msr_tgpr)) {
+ /* Swap temporary saved registers with GPRs */
+ swap_gpr_tgpr(env);
}
#if defined (TARGET_PPC64)
msr_sf = (value >> MSR_SF) & 1;
@@ -2024,7 +2016,7 @@ int do_store_msr (CPUPPCState *env, target_ulong value)
msr_sa = (value >> MSR_SA) & 1;
msr_key = (value >> MSR_KEY) & 1;
msr_pow = (value >> MSR_POW) & 1; /* POW / WE */
- msr_tlb = (value >> MSR_TLB) & 1; /* TLB / TGPR / CE */
+ msr_tgpr = (value >> MSR_TGPR) & 1; /* TGPR / CE */
msr_ile = (value >> MSR_ILE) & 1;
msr_ee = (value >> MSR_EE) & 1;
msr_pr = (value >> MSR_PR) & 1;