diff options
| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-14 07:07:08 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-14 07:07:08 +0000 |
| commit | 6ebbf390003270afece028facef4d9834df81a8c (patch) | |
| tree | adc8e9a3d586d5b1b550543fceb6ffdaeda03f6a /target-ppc/helper.c | |
| parent | d0f48074dbc21248f3b0a9fb48126cb0d95991b5 (diff) | |
Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
and using the same definition in code translation code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/helper.c')
| -rw-r--r-- | target-ppc/helper.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c index c4eab18fc8..dd5a07a53f 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -39,7 +39,7 @@ #if defined(CONFIG_USER_ONLY) int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, - int is_user, int is_softmmu) + int mmu_idx, int is_softmmu) { int exception, error_code; @@ -1349,7 +1349,7 @@ target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr) /* Perform address translation */ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, - int is_user, int is_softmmu) + int mmu_idx, int is_softmmu) { mmu_ctx_t ctx; int access_type; @@ -1370,7 +1370,7 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, if (ret == 0) { ret = tlb_set_page(env, address & TARGET_PAGE_MASK, ctx.raddr & TARGET_PAGE_MASK, ctx.prot, - is_user, is_softmmu); + mmu_idx, is_softmmu); } else if (ret < 0) { #if defined (DEBUG_MMU) if (loglevel != 0) @@ -2083,7 +2083,12 @@ void do_compute_hflags (CPUPPCState *env) env->hflags |= msr_cm << MSR_CM; env->hflags |= (uint64_t)msr_sf << MSR_SF; env->hflags |= (uint64_t)msr_hv << MSR_HV; + /* Precompute MMU index */ + if (msr_pr == 0 && msr_hv == 1) + env->mmu_idx = 2; + else #endif + env->mmu_idx = 1 - msr_pr; } /*****************************************************************************/ |