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authorTom Musta <tommusta@gmail.com>2014-01-07 10:06:00 -0600
committerAlexander Graf <agraf@suse.de>2014-03-05 03:06:42 +0100
commit28288b48a83e903198ee22d8558c43b021e39a17 (patch)
treea0913cca1f52ba2cbbf82bc84cc48c1d98cb90b4 /target-ppc/fpu_helper.c
parentfab7fe426fa5325f93c931ffbe25f4e024b1ced4 (diff)
target-ppc: Add ISA 2.06 fcfid[u][s] Instructions
This patch adds the fcfids, fcfidu and fcfidus instructions which were introduced in Power ISA 2.06B. A common macro is provided to eliminate repetitious code, and the existing fcfid instruction is refactored to use this macro. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/fpu_helper.c')
-rw-r--r--target-ppc/fpu_helper.c28
1 files changed, 19 insertions, 9 deletions
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 2f9f4dcc78..eb56082c94 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -637,16 +637,26 @@ FPU_FCTI(fctiduz, uint64_round_to_zero, 0x0000000000000000)
#endif
#if defined(TARGET_PPC64)
-/* fcfid - fcfid. */
-uint64_t helper_fcfid(CPUPPCState *env, uint64_t arg)
-{
- CPU_DoubleU farg;
-
- farg.d = int64_to_float64(arg, &env->fp_status);
- return farg.ll;
-}
-
+#define FPU_FCFI(op, cvtr, is_single) \
+uint64_t helper_##op(CPUPPCState *env, uint64_t arg) \
+{ \
+ CPU_DoubleU farg; \
+ \
+ if (is_single) { \
+ float32 tmp = cvtr(arg, &env->fp_status); \
+ farg.d = float32_to_float64(tmp, &env->fp_status); \
+ } else { \
+ farg.d = cvtr(arg, &env->fp_status); \
+ } \
+ helper_float_check_status(env); \
+ return farg.ll; \
+}
+
+FPU_FCFI(fcfid, int64_to_float64, 0)
+FPU_FCFI(fcfids, int64_to_float32, 1)
+FPU_FCFI(fcfidu, uint64_to_float64, 0)
+FPU_FCFI(fcfidus, uint64_to_float32, 1)
#endif