diff options
author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-10 11:10:23 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-10 11:10:23 +0000 |
commit | 57951c27422fc41586a5d4032e05bb300cced78d (patch) | |
tree | 7f5e53762c9cfb56438bcc471e95b7c5a8f00bcd /target-ppc/cpu.h | |
parent | 970d622e8ab1de8fdf5762e23e92a2dea9d7d36c (diff) |
target-ppc: convert most SPE integer instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5668 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r-- | target-ppc/cpu.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index c84307d911..00eac0722f 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -832,10 +832,14 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) /*****************************************************************************/ /* CRF definitions */ -#define CRF_LT 3 -#define CRF_GT 2 -#define CRF_EQ 1 -#define CRF_SO 0 +#define CRF_LT 3 +#define CRF_GT 2 +#define CRF_EQ 1 +#define CRF_SO 0 +#define CRF_CH (1 << 4) +#define CRF_CL (1 << 3) +#define CRF_CH_OR_CL (1 << 2) +#define CRF_CH_AND_CL (1 << 1) /* XER definitions */ #define XER_SO 31 |