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authorDong Xu Wang <wdongxu@linux.vnet.ibm.com>2011-11-22 18:06:21 +0800
committerStefan Hajnoczi <stefanha@linux.vnet.ibm.com>2011-12-02 10:50:57 +0000
commit4abf79a428bd1db681d6f4b5e521aa78cf913322 (patch)
tree4ed141534a6b899c851f0388b05c0d26dff35568 /target-ppc/cpu.h
parent68dfbcd4d556056c904a6bda14b59242ba22e6cf (diff)
fix spelling in target sub directory
Cc: Richard Henderson <rth@twiddle.net> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index e84108c49a..2d67d1f4b8 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1004,7 +1004,7 @@ struct CPUPPCState {
int error_code;
uint32_t pending_interrupts;
#if !defined(CONFIG_USER_ONLY)
- /* This is the IRQ controller, which is implementation dependant
+ /* This is the IRQ controller, which is implementation dependent
* and only relevant when emulating a complete machine.
*/
uint32_t irq_input_state;
@@ -1024,7 +1024,7 @@ struct CPUPPCState {
/* Those resources are used only in Qemu core */
target_ulong hflags; /* hflags is a MSR & HFLAGS_MASK */
- target_ulong hflags_nmsr; /* specific hflags, not comming from MSR */
+ target_ulong hflags_nmsr; /* specific hflags, not coming from MSR */
int mmu_idx; /* precomputed MMU index to speed up mem accesses */
/* Power management */