diff options
| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-14 12:17:09 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-14 12:17:09 +0000 |
| commit | e96efcfcb19b81d87ed3baec419b14cdd6e021a4 (patch) | |
| tree | 8889bad1c84ecf82704c967f9e52351ac3a13822 /target-ppc/cpu.h | |
| parent | ba13c4327e19c083dd76d69805c5bf3dd44ca46c (diff) | |
Fix miscellaneous display warnings for PowerPC & alpha targets
and parallel CFI flash driver.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2661 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 4b67f1a25c..740bc1b4cf 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -35,24 +35,26 @@ typedef uint64_t ppc_gpr_t; #define TARGET_LONG_BITS 64 #define TARGET_GPR_BITS 64 #define REGX "%016" PRIx64 -#define ADDRX "%016" PRIx64 #elif defined(TARGET_PPCSPE) +/* e500v2 have 36 bits physical address space */ +#define TARGET_PHYS_ADDR_BITS 64 /* GPR are 64 bits: used by vector extension */ typedef uint64_t ppc_gpr_t; #define TARGET_LONG_BITS 32 #define TARGET_GPR_BITS 64 #define REGX "%016" PRIx64 -#define ADDRX "%08" PRIx32 #else typedef uint32_t ppc_gpr_t; #define TARGET_LONG_BITS 32 #define TARGET_GPR_BITS 32 #define REGX "%08" PRIx32 -#define ADDRX "%08" PRIx32 #endif #include "cpu-defs.h" +#define ADDRX TARGET_FMT_lx +#define PADDRX TARGET_FMT_plx + #include <setjmp.h> #include "softfloat.h" |