diff options
| author | Fabien Chouteau <chouteau@adacore.com> | 2011-09-13 04:00:32 +0000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2011-10-06 09:48:09 +0200 |
| commit | ddd1055b07fdfe488a22c2275adaca75f4206d30 (patch) | |
| tree | 562b06cea9452d0bdfca3e5a0928eefe736265c9 /target-ppc/cpu.h | |
| parent | 94135e813c14bac3f967e6b5aa35b9d617737e68 (diff) | |
PPC: booke timers
While working on the emulation of the freescale p2010 (e500v2) I realized that
there's no implementation of booke's timers features. Currently mpc8544 uses
ppc_emb (ppc_emb_timers_init) which is close but not exactly like booke (for
example booke uses different SPR).
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 3f4af22397..3f77e308a6 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1018,8 +1018,35 @@ struct CPUPPCState { #if !defined(CONFIG_USER_ONLY) void *load_info; /* Holds boot loading state. */ #endif + + /* booke timers */ + + /* Specifies bit locations of the Time Base used to signal a fixed timer + * exception on a transition from 0 to 1. (watchdog or fixed-interval timer) + * + * 0 selects the least significant bit. + * 63 selects the most significant bit. + */ + uint8_t fit_period[4]; + uint8_t wdt_period[4]; }; +#define SET_FIT_PERIOD(a_, b_, c_, d_) \ +do { \ + env->fit_period[0] = (a_); \ + env->fit_period[1] = (b_); \ + env->fit_period[2] = (c_); \ + env->fit_period[3] = (d_); \ + } while (0) + +#define SET_WDT_PERIOD(a_, b_, c_, d_) \ +do { \ + env->wdt_period[0] = (a_); \ + env->wdt_period[1] = (b_); \ + env->wdt_period[2] = (c_); \ + env->wdt_period[3] = (d_); \ + } while (0) + #if !defined(CONFIG_USER_ONLY) /* Context used internally during MMU translations */ typedef struct mmu_ctx_t mmu_ctx_t; |