diff options
| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2013-12-20 17:41:30 +1100 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:22 +0100 |
| commit | 6475c9f05ca89d76635108dca64a11759838e03c (patch) | |
| tree | 8fd4a03a5d81507f1e7270dff6f188c90cb49536 /target-ppc/cpu.h | |
| parent | a5100e752b4ed1027b6db27d3fbcb0e3c62b3f94 (diff) | |
target-ppc: fix LPCR SPR number
PowerISA defines LPCR SPR number as 318=0x13E but QEMU uses the value of
316.
This fixes the definition of LPCR SPR.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index bb847676a5..4369e7cc38 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1322,12 +1322,12 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_BOOKE_IAC3 (0x13A) #define SPR_HSRR1 (0x13B) #define SPR_BOOKE_IAC4 (0x13B) -#define SPR_LPCR (0x13C) #define SPR_BOOKE_DAC1 (0x13C) #define SPR_LPIDR (0x13D) #define SPR_DABR2 (0x13D) #define SPR_BOOKE_DAC2 (0x13D) #define SPR_BOOKE_DVC1 (0x13E) +#define SPR_LPCR (0x13E) #define SPR_BOOKE_DVC2 (0x13F) #define SPR_BOOKE_TSR (0x150) #define SPR_BOOKE_TCR (0x154) |