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| author | Tom Musta <tommusta@gmail.com> | 2014-02-12 15:22:52 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:51 +0100 |
| commit | 32ea54ab5fe18954e05f33a5825ba088d6cd4163 (patch) | |
| tree | cfb95d101d8fe4234cd5d704bd3d4c5b71f4687f /target-ppc/cpu.h | |
| parent | 27b95bfe624af1ddfaf63c07f3f0a63049b8c9fc (diff) | |
target-ppc: Altivec 2.07: Add Instruction Flag
This patch adds a flag that will be used to tag the Altivec instructions
introduced in Power ISA Version 2.07.
The flag is added to Power8 model since P8 supports these instructions.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 7cf725551f..88c278845c 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1893,12 +1893,15 @@ enum { PPC2_BCTAR_ISA207 = 0x0000000000001000ULL, /* ISA 2.07 load/store quadword */ PPC2_LSQ_ISA207 = 0x0000000000002000ULL, + /* ISA 2.07 Altivec */ + PPC2_ALTIVEC_207 = 0x0000000000004000ULL, #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \ PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \ PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \ - PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207) + PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \ + PPC2_ALTIVEC_207) }; /*****************************************************************************/ |