diff options
| author | Madhavan Srinivasan <maddy@linux.vnet.ibm.com> | 2015-11-20 17:01:47 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2015-11-30 19:39:01 +1100 |
| commit | dbdc13a1ac0bfaa9a2d7069e9e6509721ed795ee (patch) | |
| tree | a6416031a0078a67d21d76a2b9493477530cc2a1 /target-ppc/cpu.h | |
| parent | e2a176dfda32f5cf80703c2921a19fe75850c38c (diff) | |
target-ppc: Move the FPSCR bit update macros to cpu.h
Move the FPSCR bit update macros defined in dfp_helper
to cpu.h. This way, fpu_helper functions can also use them
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 31c6fee6f4..9706000f8b 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -684,6 +684,27 @@ enum { #define fpscr_eex (((env->fpscr) >> FPSCR_XX) & ((env->fpscr) >> FPSCR_XE) & \ 0x1F) +#define FP_FX (1ull << FPSCR_FX) +#define FP_FEX (1ull << FPSCR_FEX) +#define FP_OX (1ull << FPSCR_OX) +#define FP_OE (1ull << FPSCR_OE) +#define FP_UX (1ull << FPSCR_UX) +#define FP_UE (1ull << FPSCR_UE) +#define FP_XX (1ull << FPSCR_XX) +#define FP_XE (1ull << FPSCR_XE) +#define FP_ZX (1ull << FPSCR_ZX) +#define FP_ZE (1ull << FPSCR_ZE) +#define FP_VX (1ull << FPSCR_VX) +#define FP_VXSNAN (1ull << FPSCR_VXSNAN) +#define FP_VXISI (1ull << FPSCR_VXISI) +#define FP_VXIMZ (1ull << FPSCR_VXIMZ) +#define FP_VXZDZ (1ull << FPSCR_VXZDZ) +#define FP_VXIDI (1ull << FPSCR_VXIDI) +#define FP_VXVC (1ull << FPSCR_VXVC) +#define FP_VXCVI (1ull << FPSCR_VXCVI) +#define FP_VE (1ull << FPSCR_VE) +#define FP_FI (1ull << FPSCR_FI) + /*****************************************************************************/ /* Vector status and control register */ #define VSCR_NJ 16 /* Vector non-java */ |