diff options
author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-27 19:30:56 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-27 19:30:56 +0000 |
commit | 01a4afeb99ff8d6174e1fdd726cb95017f5a9b07 (patch) | |
tree | a809633736db410350dbb27ab474dbc5d0f21436 /target-ppc/cpu.h | |
parent | 6a6ae23f3c7c80e66e8e900ed9820c7134997a36 (diff) |
target-ppc: convert POWER2 load/store instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5805 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r-- | target-ppc/cpu.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 87d4312e08..711044b4d9 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -561,9 +561,6 @@ struct CPUPPCState { target_ulong tgpr[4]; /* Used to speed-up TLB assist handlers */ /* Floating point execution context */ - /* temporary float registers */ - float64 ft0; - float64 ft1; float_status fp_status; /* floating point registers */ float64 fpr[32]; |