diff options
| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-22 22:41:50 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-22 22:41:50 +0000 |
| commit | 51789c410beb34423b1188a6b6e069fe8b68aebe (patch) | |
| tree | d7b4cb00c83b263006de65a44f09fc1d764663f6 /target-ppc/cpu.h | |
| parent | e864cabdc0a38bb598ddcf88b264896dc6f3e3b2 (diff) | |
PowerPC improvments:
- add missing 64 bits rotate instructions
- safely define TARGET_PPCSPE when 64 bits registers are used
a separate target will be needed to use it in 32 bits mode on 32 bits hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2527 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index e2294134d4..55b98bf5bf 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -23,13 +23,18 @@ #include "config.h" #include <stdint.h> +#if defined(TARGET_PPC64) || (HOST_LONG_BITS >= 64) +/* When using 64 bits temporary registers, + * we can use 64 bits GPR with no extra cost + */ +#define TARGET_PPCSPE +#endif + #if defined (TARGET_PPC64) typedef uint64_t ppc_gpr_t; #define TARGET_LONG_BITS 64 #define TARGET_GPR_BITS 64 #define REGX "%016" PRIx64 -/* We can safely use PowerPC SPE extension when compiling PowerPC 64 */ -#define TARGET_PPCSPE #elif defined(TARGET_PPCSPE) /* GPR are 64 bits: used by vector extension */ typedef uint64_t ppc_gpr_t; |