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author | Blue Swirl <blauwirbel@gmail.com> | 2012-11-03 12:55:05 +0000 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2012-11-03 12:55:05 +0000 |
commit | ef84755ebb38b4f5629b24440bb00f1ef5287707 (patch) | |
tree | c2d74584b5f8c85c4c61ae650e628e08403b69ec /target-ppc/cpu.h | |
parent | b76f0d8c2e3eac94bc7fd90a510cb7426b2a2699 (diff) | |
parent | 0d3cf3b6ff469bba95ae235021a3be232af4068d (diff) |
Merge branch 'trivial-patches' of git://github.com/stefanha/qemu
* 'trivial-patches' of git://github.com/stefanha/qemu:
pc: Drop redundant test for ROM memory region
exec: make some functions static
target-ppc: make some functions static
ppc: add missing static
vnc: add missing static
vl.c: add missing static
target-sparc: make do_unaligned_access static
m68k: Return semihosting errno values correctly
cadence_uart: More debug information
Conflicts:
target-m68k/m68k-semi.c
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r-- | target-ppc/cpu.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index c3cbad7371..5f1dc8b7d5 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1142,10 +1142,6 @@ int cpu_ppc_signal_handler (int host_signum, void *pinfo, int cpu_ppc_handle_mmu_fault (CPUPPCState *env, target_ulong address, int rw, int mmu_idx); #define cpu_handle_mmu_fault cpu_ppc_handle_mmu_fault -#if !defined(CONFIG_USER_ONLY) -int get_physical_address (CPUPPCState *env, mmu_ctx_t *ctx, target_ulong vaddr, - int rw, int access_type); -#endif void do_interrupt (CPUPPCState *env); void ppc_hw_interrupt (CPUPPCState *env); @@ -1179,7 +1175,6 @@ void cpu_ppc_store_decr (CPUPPCState *env, uint32_t value); uint32_t cpu_ppc_load_hdecr (CPUPPCState *env); void cpu_ppc_store_hdecr (CPUPPCState *env, uint32_t value); uint64_t cpu_ppc_load_purr (CPUPPCState *env); -void cpu_ppc_store_purr (CPUPPCState *env, uint64_t value); uint32_t cpu_ppc601_load_rtcl (CPUPPCState *env); uint32_t cpu_ppc601_load_rtcu (CPUPPCState *env); #if !defined(CONFIG_USER_ONLY) @@ -1191,8 +1186,6 @@ void store_40x_dbcr0 (CPUPPCState *env, uint32_t val); void store_40x_sler (CPUPPCState *env, uint32_t val); void store_booke_tcr (CPUPPCState *env, target_ulong val); void store_booke_tsr (CPUPPCState *env, target_ulong val); -void booke206_flush_tlb(CPUPPCState *env, int flags, const int check_iprot); -hwaddr booke206_tlb_to_page_size(CPUPPCState *env, ppcmas_tlb_t *tlb); int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb, hwaddr *raddrp, target_ulong address, uint32_t pid); |