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authorAlexander Graf <agraf@suse.de>2012-01-19 19:31:51 +0100
committerAlexander Graf <agraf@suse.de>2012-02-02 02:47:45 +0100
commite9205258ac7de7aba579ee07efc49dda66f51e63 (patch)
treeecbad4dc0c778a8fabb5606dce3a5ecd28052ad2 /target-ppc/cpu.h
parenta31be480a0b4ede50f260dd29971dca961da3a2c (diff)
PPC: Add IVOR 38-42
Our code only knows IVORs up to 37. Add the new ones defined in ISA 2.06 from 38 - 42. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 2d67d1f4b8..6f4cddecfa 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1371,6 +1371,11 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
#define SPR_BOOKE_IVOR13 (0x19D)
#define SPR_BOOKE_IVOR14 (0x19E)
#define SPR_BOOKE_IVOR15 (0x19F)
+#define SPR_BOOKE_IVOR38 (0x1B0)
+#define SPR_BOOKE_IVOR39 (0x1B1)
+#define SPR_BOOKE_IVOR40 (0x1B2)
+#define SPR_BOOKE_IVOR41 (0x1B3)
+#define SPR_BOOKE_IVOR42 (0x1B4)
#define SPR_BOOKE_SPEFSCR (0x200)
#define SPR_Exxx_BBEAR (0x201)
#define SPR_Exxx_BBTAR (0x202)