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authorJulio Guerra <guerr@julio.in>2013-06-24 23:15:54 +0200
committerAlexander Graf <agraf@suse.de>2013-07-11 18:51:23 +0200
commit7162bdea75e9f63afdd2cacfe26ee4b472a59362 (patch)
tree66141574af3bd2dc642e2c4696c1c1ca28099fe8 /target-ppc/cpu-models.h
parentc170a23ca0097a95b44fc7cc604018cd3c3b7d44 (diff)
e600 core for MPC86xx processors
MPC86xx processors are based on the e600 core, which is not the case in qemu where it is based on the 7400 processor. This patch creates the e600 core and instantiates the MPC86xx processors based on it. Therefore, adding the high BATs, the SPRG 4..7 registers, which are e600-specific [1], and a HW MMU model (as 7400). This allows to define the MPC8610 processor too. Tested with a kernel using the HW TLB misses. [1] http://cache.freescale.com/files/32bit/doc/ref_manual/E600CORERM.pdf Signed-off-by: Julio Guerra <guerr@julio.in> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu-models.h')
-rw-r--r--target-ppc/cpu-models.h4
1 files changed, 1 insertions, 3 deletions
diff --git a/target-ppc/cpu-models.h b/target-ppc/cpu-models.h
index ae8f7c743e..fcd3a151d6 100644
--- a/target-ppc/cpu-models.h
+++ b/target-ppc/cpu-models.h
@@ -732,9 +732,7 @@ enum {
POWERPC_SVR_8568E = 0x807D0011 | POWERPC_SVR_E500,
POWERPC_SVR_8572 = 0x80E00010 | POWERPC_SVR_E500,
POWERPC_SVR_8572E = 0x80E80010 | POWERPC_SVR_E500,
-#if 0
- POWERPC_SVR_8610 = xxx,
-#endif
+ POWERPC_SVR_8610 = 0x80A00011,
POWERPC_SVR_8641 = 0x80900021,
POWERPC_SVR_8641D = 0x80900121,
};