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authorNikunj A Dadhania <nikunj@linux.vnet.ibm.com>2016-10-12 10:38:51 +0530
committerDavid Gibson <david@gibson.dropbear.id.au>2016-10-14 10:06:47 +1100
commit125a9b2327173f4cd38509276ea74f2133934820 (patch)
treef45cb541161976afd0c22476e5ee215afd1043dc /target-ppc/cpu-models.c
parent74cba2b3b23d069d1a3d9b3ef7876123d939d3ba (diff)
target-ppc: implement vexts[bh]2w and vexts[bhw]2d
Vector Extend Sign Instructions: vextsb2w: Vector Extend Sign Byte To Word vextsh2w: Vector Extend Sign Halfword To Word vextsb2d: Vector Extend Sign Byte To Doubleword vextsh2d: Vector Extend Sign Halfword To Doubleword vextsw2d: Vector Extend Sign Word To Doubleword Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/cpu-models.c')
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