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authorPaulo Alcantara <pcacjr@gmail.com>2015-06-28 14:58:56 -0300
committerMichael S. Tsirkin <mst@redhat.com>2015-07-07 13:12:22 +0300
commit920557971b60e53c2f3f22e5d6c620ab1ed411fd (patch)
tree5630d4b1c74b28ba22273d5980ecedcbe367fa38 /target-openrisc
parent71ba2f0af398f616e154137d9fdda25c2da01324 (diff)
ich9: add TCO interface emulation
This interface provides some registers within a 32-byte range and can be acessed through PCI-to-LPC bridge interface (PMBASE + 0x60). It's commonly used as a watchdog timer to detect system lockups through SMIs that are generated -- if TCO_EN bit is set -- on every timeout. If NO_REBOOT bit is not set in GCS (General Control and Status register), the system will be resetted upon second timeout if TCO_RLD register wasn't previously written to prevent timeout. This patch adds support to TCO watchdog logic and few other features like mapping NMIs to SMIs (NMI2SMI_EN bit), system intruder detection, etc. are not implemented yet. Signed-off-by: Paulo Alcantara <pcacjr@zytor.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'target-openrisc')
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