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authorRichard Henderson <rth@twiddle.net>2012-10-05 16:55:04 -0700
committerBlue Swirl <blauwirbel@gmail.com>2012-10-07 16:39:33 +0000
commitbd49ed41ebe518c79bd52e46ce5b9cf278f8a2af (patch)
tree94cf73b2c8fff7b33da40a36107cc8984ed93ce2 /target-openrisc
parentc28ae41ecd3bec70f1db8545e0800b9023891057 (diff)
target-sparc: Tidy Tcc
Share more code between unconditional and conditional paths. Move the computation of the trap number into the conditional BB; avoid using temporaries that have gone out of scope (cpu_tmp32) or rely on local temps (cpu_dst). Fully fold the exception number when the trap number is %g0+imm. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-openrisc')
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