diff options
| author | Blue Swirl <blauwirbel@gmail.com> | 2011-05-21 07:10:23 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-06-26 18:25:31 +0000 |
| commit | f081c76ccfdbc1fdaa90fa5eb6abad46c1b5bfa8 (patch) | |
| tree | 189b8a7a36be8eb52b8704c940b6ef328c18005b /target-mips | |
| parent | f3e270377acd074f62e08960ef9444adf67d3590 (diff) | |
Move cpu_has_work and cpu_pc_from_tb to cpu.h
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is
needed by later patches.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/cpu.h | 24 | ||||
| -rw-r--r-- | target-mips/exec.h | 22 |
2 files changed, 24 insertions, 22 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 0b98d10266..b0ac4da5a7 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -656,4 +656,28 @@ static inline void cpu_set_tls(CPUState *env, target_ulong newtls) env->tls_value = newtls; } +static inline int cpu_has_work(CPUState *env) +{ + int has_work = 0; + + /* It is implementation dependent if non-enabled interrupts + wake-up the CPU, however most of the implementations only + check for interrupts that can be taken. */ + if ((env->interrupt_request & CPU_INTERRUPT_HARD) && + cpu_mips_hw_interrupts_pending(env)) { + has_work = 1; + } + + return has_work; +} + +#include "exec-all.h" + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->active_tc.PC = tb->pc; + env->hflags &= ~MIPS_HFLAG_BMASK; + env->hflags |= tb->flags & MIPS_HFLAG_BMASK; +} + #endif /* !defined (__MIPS_CPU_H__) */ diff --git a/target-mips/exec.h b/target-mips/exec.h index e908c3f04b..a3a7262a84 100644 --- a/target-mips/exec.h +++ b/target-mips/exec.h @@ -17,21 +17,6 @@ register struct CPUMIPSState *env asm(AREG0); #include "softmmu_exec.h" #endif /* !defined(CONFIG_USER_ONLY) */ -static inline bool cpu_has_work(CPUState *env) -{ - int has_work = 0; - - /* It is implementation dependent if non-enabled interrupts - wake-up the CPU, however most of the implementations only - check for interrupts that can be taken. */ - if ((env->interrupt_request & CPU_INTERRUPT_HARD) && - cpu_mips_hw_interrupts_pending(env)) { - has_work = 1; - } - - return has_work; -} - static inline void compute_hflags(CPUState *env) { env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 | @@ -73,11 +58,4 @@ static inline void compute_hflags(CPUState *env) } } -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) -{ - env->active_tc.PC = tb->pc; - env->hflags &= ~MIPS_HFLAG_BMASK; - env->hflags |= tb->flags & MIPS_HFLAG_BMASK; -} - #endif /* !defined(__QEMU_MIPS_EXEC_H__) */ |