diff options
author | Richard Henderson <rth@twiddle.net> | 2015-08-29 12:59:29 -0700 |
---|---|---|
committer | Richard Henderson <rth@twiddle.net> | 2015-10-07 20:36:27 +1100 |
commit | 667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96 (patch) | |
tree | 0d1aa7775d9cb83ce858394f2e56114ccdc23f94 /target-mips | |
parent | 765b842adec4c5a359e69ca08785553599f71496 (diff) |
target-*: Unconditionally emit tcg_gen_insn_start
While we're at it, emit the opcode adjacent to where we currently
record data for search_pc. This puts gen_io_start et al on the
"correct" side of the marker.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-mips')
-rw-r--r-- | target-mips/translate.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 2b3f2b00b1..aa0e0fd55e 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -18904,10 +18904,6 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx) gen_set_label(l1); } - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { - tcg_gen_insn_start(ctx->pc); - } - op = MASK_OP_MAJOR(ctx->opcode); rs = (ctx->opcode >> 21) & 0x1f; rt = (ctx->opcode >> 16) & 0x1f; @@ -19622,8 +19618,11 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb, tcg_ctx.gen_opc_instr_start[lj] = 1; tcg_ctx.gen_opc_icount[lj] = num_insns; } - if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) + tcg_gen_insn_start(ctx.pc); + + if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) { gen_io_start(); + } is_slot = ctx.hflags & MIPS_HFLAG_BMASK; if (!(ctx.hflags & MIPS_HFLAG_M16)) { |