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authorAnthony Liguori <aliguori@us.ibm.com>2012-06-06 17:55:07 +0800
committerAnthony Liguori <aliguori@us.ibm.com>2012-06-06 17:55:07 +0800
commite1ae9a7a78be8d894c111059955fe0e25ec4c203 (patch)
tree19e9049edc588605825dcdfee7000d72de7faf77 /target-mips
parent6e72ae4690abde06c7e40603b0f03ab7bcf92b0c (diff)
parentb7e516ce04fecf260e7c0893b0afb3ff24a40358 (diff)
Merge remote-tracking branch 'afaerber-or/qom-cpu-3' into staging
* afaerber-or/qom-cpu-3: (74 commits) Kill off cpu_state_reset() linux-user: Use cpu_reset() after cpu_init() / cpu_copy() bsd-user: Use cpu_reset() in after cpu_init() leon3: Store SPARCCPU in ResetData leon3: Use cpu_sparc_init() to obtain SPARCCPU sun4u: Store SPARCCPU in ResetData sun4u: Let cpu_devinit() return SPARCCPU sun4u: Use cpu_sparc_init() to obtain SPARCCPU sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset() sun4m: Use cpu_sparc_init() to obtain SPARCCPU target-sparc: Let cpu_sparc_init() return SPARCCPU cpu-exec: Use cpu_reset() in cpu_exec() for TARGET_PPC virtex_ml507: Pass PowerPCCPU to main_cpu_reset() virtex_ml507: Let ppc440_init_xilinx() return PowerPCCPU virtex_ml507: Use cpu_ppc_init() to obtain PowerPCCPU ppc_prep: Pass PowerPCCPU to ppc_prep_reset() ppc_prep: Use cpu_ppc_init() to obtain PowerPCCPU ppc_oldworld: Pass PowerPCCPU to ppc_heathrow_reset() ppc_oldworld: Use cpu_ppc_init() to obtain PowerPCCPU ppc_newworld: Pass PowerPCCPU to ppc_core99_reset() ...
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/cpu.h15
-rw-r--r--target-mips/helper.c3
-rw-r--r--target-mips/translate.c6
3 files changed, 18 insertions, 6 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 44c1152a3a..ce3467f140 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -496,7 +496,6 @@ void cpu_unassigned_access(CPUMIPSState *env, target_phys_addr_t addr,
void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf);
-#define cpu_init cpu_mips_init
#define cpu_exec cpu_mips_exec
#define cpu_gen_code cpu_mips_gen_code
#define cpu_signal_handler cpu_mips_signal_handler
@@ -626,9 +625,21 @@ enum {
#define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
int cpu_mips_exec(CPUMIPSState *s);
-CPUMIPSState *cpu_mips_init(const char *cpu_model);
+MIPSCPU *cpu_mips_init(const char *cpu_model);
int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
+static inline CPUMIPSState *cpu_init(const char *cpu_model)
+{
+ MIPSCPU *cpu = cpu_mips_init(cpu_model);
+ if (cpu == NULL) {
+ return NULL;
+ }
+ return &cpu->env;
+}
+
+/* TODO QOM'ify CPU reset and remove */
+void cpu_state_reset(CPUMIPSState *s);
+
/* mips_timer.c */
uint32_t cpu_mips_get_random (CPUMIPSState *env);
uint32_t cpu_mips_get_count (CPUMIPSState *env);
diff --git a/target-mips/helper.c b/target-mips/helper.c
index ddf9cb72f4..4208bb20c8 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -399,6 +399,7 @@ static void set_hflags_for_handler (CPUMIPSState *env)
void do_interrupt (CPUMIPSState *env)
{
#if !defined(CONFIG_USER_ONLY)
+ MIPSCPU *cpu = mips_env_get_cpu(env);
target_ulong offset;
int cause = -1;
const char *name;
@@ -452,7 +453,7 @@ void do_interrupt (CPUMIPSState *env)
set_hflags_for_handler(env);
break;
case EXCP_RESET:
- cpu_state_reset(env);
+ cpu_reset(CPU(cpu));
break;
case EXCP_SRESET:
env->CP0_Status |= (1 << CP0St_SR);
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 0c563eedfa..4e15ee36b8 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12689,7 +12689,7 @@ static void mips_tcg_init(void)
#include "translate_init.c"
-CPUMIPSState *cpu_mips_init (const char *cpu_model)
+MIPSCPU *cpu_mips_init(const char *cpu_model)
{
MIPSCPU *cpu;
CPUMIPSState *env;
@@ -12709,9 +12709,9 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model)
fpu_init(env, def);
mvp_init(env, def);
mips_tcg_init();
- cpu_state_reset(env);
+ cpu_reset(CPU(cpu));
qemu_init_vcpu(env);
- return env;
+ return cpu;
}
void cpu_state_reset(CPUMIPSState *env)