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authorPeter Crosthwaite <crosthwaitepeter@gmail.com>2015-07-11 19:00:04 -0700
committerAndreas Färber <afaerber@suse.de>2015-10-22 15:49:40 +0200
commit63a946c7e3b081d56e617bf264fcb2881a982848 (patch)
tree1840a48a24b064e71f7d083ecf594c088b921478 /target-mips
parentd49dd523e459a4c001a0c87a438fd2fa1f5b4bae (diff)
disas: QOMify mips specific disas setup
Move the target_disas() mips specifics to the CPUClass::disas_set_info() hook and delete the #ifdef specific code in disas.c. Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/cpu.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 7fe1f0407f..37880d20e0 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -97,6 +97,14 @@ static void mips_cpu_reset(CPUState *s)
#endif
}
+static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) {
+#ifdef TARGET_WORDS_BIGENDIAN
+ info->print_insn = print_insn_big_mips;
+#else
+ info->print_insn = print_insn_little_mips;
+#endif
+}
+
static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -150,6 +158,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
cc->get_phys_page_debug = mips_cpu_get_phys_page_debug;
cc->vmsd = &vmstate_mips_cpu;
#endif
+ cc->disas_set_info = mips_cpu_disas_set_info;
cc->gdb_num_core_regs = 73;
cc->gdb_stop_before_watchpoint = true;