diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-07 01:11:15 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-07 01:11:15 +0000 |
| commit | cbeb0857da13d8a06453dd1527a2bcca61556497 (patch) | |
| tree | eb6c1e3fda673ddb31026d25ffd84a3daef41673 /target-mips | |
| parent | e04bcc691b54cb680138e3aa6e583c82c91cfca2 (diff) | |
Set proper BadVAddress value for unaligned instruction fetch.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/translate.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index c646f7f376..eaea42516e 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1486,7 +1486,7 @@ static void gen_compute_branch (DisasContext *ctx, uint32_t opc, /* Jump to register */ if (offset != 0 && offset != 16) { /* Hint = 0 is JR/JALR, hint 16 is JR.HB/JALR.HB, the - others are reserved. */ + others are reserved. */ generate_exception(ctx, EXCP_RI); return; } @@ -4629,6 +4629,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx) /* make sure instructions are on a word boundary */ if (ctx->pc & 0x3) { + env->CP0_BadVAddr = ctx->pc; generate_exception(ctx, EXCP_AdEL); return; } |