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authorRichard Henderson <rth@twiddle.net>2014-09-13 09:45:29 -0700
committerPeter Maydell <peter.maydell@linaro.org>2014-09-25 18:54:22 +0100
commitfa4faba448046574c8c820098ed46c9a0b5589a6 (patch)
tree53d5c020e1f981c3aafb4eb01fcee4a6527cebbb /target-mips
parentdfdb483454f8fcaab5ba55a0342cd5e3aec8815a (diff)
target-mips: Use cpu_exec_interrupt qom hook
Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Tested-by: Leon Alrae <leon.alrae@imgtec.com> Message-id: 1410626734-3804-19-git-send-email-rth@twiddle.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/cpu-qom.h1
-rw-r--r--target-mips/cpu.c1
-rw-r--r--target-mips/helper.c17
3 files changed, 19 insertions, 0 deletions
diff --git a/target-mips/cpu-qom.h b/target-mips/cpu-qom.h
index 2cff15a273..2ffc1bf3f2 100644
--- a/target-mips/cpu-qom.h
+++ b/target-mips/cpu-qom.h
@@ -75,6 +75,7 @@ static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env)
#define ENV_OFFSET offsetof(MIPSCPU, env)
void mips_cpu_do_interrupt(CPUState *cpu);
+bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
int flags);
hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index b3e0e6cce7..5ed60f78a7 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -136,6 +136,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
cc->has_work = mips_cpu_has_work;
cc->do_interrupt = mips_cpu_do_interrupt;
+ cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
cc->dump_state = mips_cpu_dump_state;
cc->set_pc = mips_cpu_set_pc;
cc->synchronize_from_tb = mips_cpu_synchronize_from_tb;
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 8a997e44e5..fe16820885 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -675,6 +675,23 @@ void mips_cpu_do_interrupt(CPUState *cs)
cs->exception_index = EXCP_NONE;
}
+bool mips_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
+{
+ if (interrupt_request & CPU_INTERRUPT_HARD) {
+ MIPSCPU *cpu = MIPS_CPU(cs);
+ CPUMIPSState *env = &cpu->env;
+
+ if (cpu_mips_hw_interrupts_pending(env)) {
+ /* Raise it */
+ cs->exception_index = EXCP_EXT_INTERRUPT;
+ env->error_code = 0;
+ mips_cpu_do_interrupt(cs);
+ return true;
+ }
+ }
+ return false;
+}
+
#if !defined(CONFIG_USER_ONLY)
void r4k_invalidate_tlb (CPUMIPSState *env, int idx, int use_extra)
{