diff options
author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-16 21:08:06 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-16 21:08:06 +0000 |
commit | 5fafdf24ef2c090c164d4dc89684b3f379dbdd87 (patch) | |
tree | c0654ee63b6dac76d98b427e92ef16850a90c652 /target-mips | |
parent | bd494f4cbd4187dda8cc8f4739763f24a31a4c8b (diff) |
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
-rw-r--r-- | target-mips/exec.h | 4 | ||||
-rw-r--r-- | target-mips/fop_template.c | 4 | ||||
-rw-r--r-- | target-mips/helper.c | 6 | ||||
-rw-r--r-- | target-mips/op.c | 2 | ||||
-rw-r--r-- | target-mips/op_helper.c | 16 | ||||
-rw-r--r-- | target-mips/op_mem.c | 2 | ||||
-rw-r--r-- | target-mips/op_template.c | 2 | ||||
-rw-r--r-- | target-mips/translate.c | 12 |
8 files changed, 24 insertions, 24 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h index 53c4189a51..5b8577eaf2 100644 --- a/target-mips/exec.h +++ b/target-mips/exec.h @@ -96,7 +96,7 @@ void do_mtc0_entryhi(uint32_t in); void do_mtc0_status_debug(uint32_t old, uint32_t val); void do_mtc0_status_irqraise_debug(void); void dump_fpu(CPUState *env); -void fpu_dump_state(CPUState *env, FILE *f, +void fpu_dump_state(CPUState *env, FILE *f, int (*fpu_fprintf)(FILE *f, const char *fmt, ...), int flags); void dump_sc (void); @@ -145,7 +145,7 @@ void do_raise_exception (uint32_t exception); void do_raise_exception_direct_err (uint32_t exception, int error_code); void do_raise_exception_direct (uint32_t exception); -void cpu_dump_state(CPUState *env, FILE *f, +void cpu_dump_state(CPUState *env, FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...), int flags); void cpu_mips_irqctrl_init (void); diff --git a/target-mips/fop_template.c b/target-mips/fop_template.c index bbdcb28903..25b2ca7a54 100644 --- a/target-mips/fop_template.c +++ b/target-mips/fop_template.c @@ -1,7 +1,7 @@ /* - * MIPS emulation micro-operations templates for floating point reg + * MIPS emulation micro-operations templates for floating point reg * load & store for qemu. - * + * * Copyright (c) 2006 Marius Groeger * * This library is free software; you can redistribute it and/or diff --git a/target-mips/helper.c b/target-mips/helper.c index 6d0be10156..9a503456b6 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -1,6 +1,6 @@ /* * MIPS emulation helpers for qemu. - * + * * Copyright (c) 2004-2005 Jocelyn Mayer * * This library is free software; you can redistribute it and/or @@ -203,7 +203,7 @@ static int get_physical_address (CPUState *env, target_ulong *physical, return ret; } -#if defined(CONFIG_USER_ONLY) +#if defined(CONFIG_USER_ONLY) target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) { return addr; @@ -293,7 +293,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, /* TLB match but 'D' bit is cleared */ exception = EXCP_LTLBL; break; - + } /* Raise exception */ env->CP0_BadVAddr = address; diff --git a/target-mips/op.c b/target-mips/op.c index 3f52f59d34..8d4c7d4afd 100644 --- a/target-mips/op.c +++ b/target-mips/op.c @@ -1,6 +1,6 @@ /* * MIPS emulation micro-operations for qemu. - * + * * Copyright (c) 2004-2005 Jocelyn Mayer * Copyright (c) 2006 Marius Groeger (FPU operations) * Copyright (c) 2007 Thiemo Seufer (64-bit FPU support) diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index c87317a44f..9d2f99e668 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -1,6 +1,6 @@ /* * MIPS emulation helpers for qemu. - * + * * Copyright (c) 2004-2005 Jocelyn Mayer * * This library is free software; you can redistribute it and/or @@ -244,7 +244,7 @@ void do_ddivu (void) #endif #endif /* TARGET_MIPS64 */ -#if defined(CONFIG_USER_ONLY) +#if defined(CONFIG_USER_ONLY) void do_mfc0_random (void) { cpu_abort(env, "mfc0 random\n"); @@ -321,25 +321,25 @@ void fpu_handle_exception(void) enable = GET_FP_ENABLE(env->fpu->fcr31); - /* determine current flags */ + /* determine current flags */ if (flags & float_flag_invalid) { cpuflags |= FP_INVALID; cause |= FP_INVALID & enable; } if (flags & float_flag_divbyzero) { - cpuflags |= FP_DIV0; + cpuflags |= FP_DIV0; cause |= FP_DIV0 & enable; } if (flags & float_flag_overflow) { - cpuflags |= FP_OVERFLOW; + cpuflags |= FP_OVERFLOW; cause |= FP_OVERFLOW & enable; } if (flags & float_flag_underflow) { - cpuflags |= FP_UNDERFLOW; + cpuflags |= FP_UNDERFLOW; cause |= FP_UNDERFLOW & enable; } if (flags & float_flag_inexact) { - cpuflags |= FP_INEXACT; + cpuflags |= FP_INEXACT; cause |= FP_INEXACT & enable; } SET_FP_FLAGS(env->fpu->fcr31, cpuflags); @@ -539,7 +539,7 @@ void do_pmon (int function) } } -#if !defined(CONFIG_USER_ONLY) +#if !defined(CONFIG_USER_ONLY) static void do_unaligned_access (target_ulong addr, int is_write, int is_user, void *retaddr); diff --git a/target-mips/op_mem.c b/target-mips/op_mem.c index 602c071c5b..19241f1438 100644 --- a/target-mips/op_mem.c +++ b/target-mips/op_mem.c @@ -1,6 +1,6 @@ /* * MIPS emulation memory micro-operations for qemu. - * + * * Copyright (c) 2004-2005 Jocelyn Mayer * * This library is free software; you can redistribute it and/or diff --git a/target-mips/op_template.c b/target-mips/op_template.c index 41d954c1db..f3a05ade65 100644 --- a/target-mips/op_template.c +++ b/target-mips/op_template.c @@ -1,6 +1,6 @@ /* * MIPS emulation micro-operations templates for reg load & store for qemu. - * + * * Copyright (c) 2004-2005 Jocelyn Mayer * * This library is free software; you can redistribute it and/or diff --git a/target-mips/translate.c b/target-mips/translate.c index d7bb20af3e..ee15193c24 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1,6 +1,6 @@ /* * MIPS32 emulation for qemu: main translation routines. - * + * * Copyright (c) 2004-2005 Jocelyn Mayer * Copyright (c) 2006 Marius Groeger (FPU operations) * Copyright (c) 2006 Thiemo Seufer (MIPS32R2 support) @@ -6514,7 +6514,7 @@ done_generating: fprintf(logfile, "---------------- %d %08x\n", ctx.bstate, ctx.hflags); } #endif - + return 0; } @@ -6528,7 +6528,7 @@ int gen_intermediate_code_pc (CPUState *env, struct TranslationBlock *tb) return gen_intermediate_code_internal(env, tb, 1); } -void fpu_dump_state(CPUState *env, FILE *f, +void fpu_dump_state(CPUState *env, FILE *f, int (*fpu_fprintf)(FILE *f, const char *fmt, ...), int flags) { @@ -6568,7 +6568,7 @@ void fpu_dump_state(CPUState *env, FILE *f, void dump_fpu (CPUState *env) { - if (loglevel) { + if (loglevel) { fprintf(logfile, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n", env->PC[env->current_tc], env->HI[0][env->current_tc], env->LO[0][env->current_tc], env->hflags, env->btarget, env->bcond); fpu_dump_state(env, logfile, fprintf, 0); @@ -6608,12 +6608,12 @@ void cpu_mips_check_sign_extensions (CPUState *env, FILE *f, } #endif -void cpu_dump_state (CPUState *env, FILE *f, +void cpu_dump_state (CPUState *env, FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...), int flags) { int i; - + cpu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n", env->PC[env->current_tc], env->HI[env->current_tc], env->LO[env->current_tc], env->hflags, env->btarget, env->bcond); for (i = 0; i < 32; i++) { |