diff options
author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-09 03:12:08 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-09 03:12:08 +0000 |
commit | 4e9f853731f060236d9036663c12ca0594395d0d (patch) | |
tree | a9ddb70c5c70d8a5d520f0a35f6739928a413f14 /target-mips | |
parent | 0e21e12bb311c4c1095d0269dc2ef81196ccb60a (diff) |
Fix [ls][wd][lr] instructions, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3372 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
-rw-r--r-- | target-mips/exec.h | 30 | ||||
-rw-r--r-- | target-mips/op_helper.c | 12 | ||||
-rw-r--r-- | target-mips/op_mem.c | 223 | ||||
-rw-r--r-- | target-mips/translate.c | 8 |
4 files changed, 206 insertions, 67 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h index 8e909787e8..ea95da06e2 100644 --- a/target-mips/exec.h +++ b/target-mips/exec.h @@ -100,36 +100,6 @@ void fpu_dump_state(CPUState *env, FILE *f, int (*fpu_fprintf)(FILE *f, const char *fmt, ...), int flags); void dump_sc (void); -void do_lwl_raw (uint32_t); -void do_lwr_raw (uint32_t); -uint32_t do_swl_raw (uint32_t); -uint32_t do_swr_raw (uint32_t); -#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) -void do_ldl_raw (uint64_t); -void do_ldr_raw (uint64_t); -uint64_t do_sdl_raw (uint64_t); -uint64_t do_sdr_raw (uint64_t); -#endif -#if !defined(CONFIG_USER_ONLY) -void do_lwl_user (uint32_t); -void do_lwl_kernel (uint32_t); -void do_lwr_user (uint32_t); -void do_lwr_kernel (uint32_t); -uint32_t do_swl_user (uint32_t); -uint32_t do_swl_kernel (uint32_t); -uint32_t do_swr_user (uint32_t); -uint32_t do_swr_kernel (uint32_t); -#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) -void do_ldl_user (uint64_t); -void do_ldl_kernel (uint64_t); -void do_ldr_user (uint64_t); -void do_ldr_kernel (uint64_t); -uint64_t do_sdl_user (uint64_t); -uint64_t do_sdl_kernel (uint64_t); -uint64_t do_sdr_user (uint64_t); -uint64_t do_sdr_kernel (uint64_t); -#endif -#endif void do_pmon (int function); void dump_sc (void); diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index f4313280e8..3c23d8c362 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -62,18 +62,6 @@ void do_raise_exception_direct (uint32_t exception) do_raise_exception_direct_err (exception, 0); } -#define MEMSUFFIX _raw -#include "op_helper_mem.c" -#undef MEMSUFFIX -#if !defined(CONFIG_USER_ONLY) -#define MEMSUFFIX _user -#include "op_helper_mem.c" -#undef MEMSUFFIX -#define MEMSUFFIX _kernel -#include "op_helper_mem.c" -#undef MEMSUFFIX -#endif - #if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) #if TARGET_LONG_BITS > HOST_LONG_BITS /* Those might call libgcc functions. */ diff --git a/target-mips/op_mem.c b/target-mips/op_mem.c index a15ad5a961..d402d616b1 100644 --- a/target-mips/op_mem.c +++ b/target-mips/op_mem.c @@ -75,34 +75,92 @@ void glue(op_sw, MEMSUFFIX) (void) /* "half" load and stores. We must do the memory access inline, or fault handling won't work. */ -/* XXX: This is broken, CP0_BADVADDR has the wrong (aligned) value. */ + +#ifdef TARGET_WORDS_BIGENDIAN +#define GET_LMASK(v) ((v) & 3) +#define GET_OFFSET(addr, offset) (addr + (offset)) +#else +#define GET_LMASK(v) (((v) & 3) ^ 3) +#define GET_OFFSET(addr, offset) (addr - (offset)) +#endif + void glue(op_lwl, MEMSUFFIX) (void) { - uint32_t tmp = glue(ldl, MEMSUFFIX)(T0 & ~3); - CALL_FROM_TB1(glue(do_lwl, MEMSUFFIX), tmp); + target_ulong tmp; + + tmp = glue(ldub, MEMSUFFIX)(T0); + T1 = (int32_t)((T1 & 0x00FFFFFF) | (tmp << 24)); + + if (GET_LMASK(T0) <= 2) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 1)); + T1 = (T1 & 0xFF00FFFF) | (tmp << 16); + } + + if (GET_LMASK(T0) <= 1) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 2)); + T1 = (T1 & 0xFFFF00FF) | (tmp << 8); + } + + if (GET_LMASK(T0) == 0) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 3)); + T1 = (T1 & 0xFFFFFF00) | tmp; + } RETURN(); } void glue(op_lwr, MEMSUFFIX) (void) { - uint32_t tmp = glue(ldl, MEMSUFFIX)(T0 & ~3); - CALL_FROM_TB1(glue(do_lwr, MEMSUFFIX), tmp); + target_ulong tmp; + + tmp = glue(ldub, MEMSUFFIX)(T0); + T1 = (T1 & 0xFFFFFF00) | tmp; + + if (GET_LMASK(T0) >= 1) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -1)); + T1 = (T1 & 0xFFFF00FF) | (tmp << 8); + } + + if (GET_LMASK(T0) >= 2) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -2)); + T1 = (T1 & 0xFF00FFFF) | (tmp << 16); + } + + if (GET_LMASK(T0) == 3) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -3)); + T1 = (T1 & 0x00FFFFFF) | (tmp << 24); + } RETURN(); } void glue(op_swl, MEMSUFFIX) (void) { - uint32_t tmp = glue(ldl, MEMSUFFIX)(T0 & ~3); - tmp = CALL_FROM_TB1(glue(do_swl, MEMSUFFIX), tmp); - glue(stl, MEMSUFFIX)(T0 & ~3, tmp); + glue(stb, MEMSUFFIX)(T0, (uint8_t)(T1 >> 24)); + + if (GET_LMASK(T0) <= 2) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 1), (uint8_t)(T1 >> 16)); + + if (GET_LMASK(T0) <= 1) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 2), (uint8_t)(T1 >> 8)); + + if (GET_LMASK(T0) == 0) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 3), (uint8_t)T1); + RETURN(); } void glue(op_swr, MEMSUFFIX) (void) { - uint32_t tmp = glue(ldl, MEMSUFFIX)(T0 & ~3); - tmp = CALL_FROM_TB1(glue(do_swr, MEMSUFFIX), tmp); - glue(stl, MEMSUFFIX)(T0 & ~3, tmp); + glue(stb, MEMSUFFIX)(T0, (uint8_t)T1); + + if (GET_LMASK(T0) >= 1) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -1), (uint8_t)(T1 >> 8)); + + if (GET_LMASK(T0) >= 2) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -2), (uint8_t)(T1 >> 16)); + + if (GET_LMASK(T0) == 3) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -3), (uint8_t)(T1 >> 24)); + RETURN(); } @@ -145,33 +203,156 @@ void glue(op_sd, MEMSUFFIX) (void) /* "half" load and stores. We must do the memory access inline, or fault handling won't work. */ + +#ifdef TARGET_WORDS_BIGENDIAN +#define GET_LMASK64(v) ((v) & 7) +#else +#define GET_LMASK64(v) (((v) & 7) ^ 7) +#endif + void glue(op_ldl, MEMSUFFIX) (void) { - target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7); - CALL_FROM_TB1(glue(do_ldl, MEMSUFFIX), tmp); + uint64_t tmp; + + tmp = glue(ldub, MEMSUFFIX)(T0); + T1 = (T1 & 0x00FFFFFFFFFFFFFFULL) | (tmp << 56); + + if (GET_LMASK64(T0) <= 6) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 1)); + T1 = (T1 & 0xFF00FFFFFFFFFFFFULL) | (tmp << 48); + } + + if (GET_LMASK64(T0) <= 5) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 2)); + T1 = (T1 & 0xFFFF00FFFFFFFFFFULL) | (tmp << 40); + } + + if (GET_LMASK64(T0) <= 4) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 3)); + T1 = (T1 & 0xFFFFFF00FFFFFFFFULL) | (tmp << 32); + } + + if (GET_LMASK64(T0) <= 3) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 4)); + T1 = (T1 & 0xFFFFFFFF00FFFFFFULL) | (tmp << 24); + } + + if (GET_LMASK64(T0) <= 2) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 5)); + T1 = (T1 & 0xFFFFFFFFFF00FFFFULL) | (tmp << 16); + } + + if (GET_LMASK64(T0) <= 1) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 6)); + T1 = (T1 & 0xFFFFFFFFFFFF00FFULL) | (tmp << 8); + } + + if (GET_LMASK64(T0) == 0) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 7)); + T1 = (T1 & 0xFFFFFFFFFFFFFF00ULL) | tmp; + } + RETURN(); } void glue(op_ldr, MEMSUFFIX) (void) { - target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7); - CALL_FROM_TB1(glue(do_ldr, MEMSUFFIX), tmp); + uint64_t tmp; + + tmp = glue(ldub, MEMSUFFIX)(T0); + T1 = (T1 & 0xFFFFFFFFFFFFFF00ULL) | tmp; + + if (GET_LMASK64(T0) >= 1) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -1)); + T1 = (T1 & 0xFFFFFFFFFFFF00FFULL) | (tmp << 8); + } + + if (GET_LMASK64(T0) >= 2) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -2)); + T1 = (T1 & 0xFFFFFFFFFF00FFFFULL) | (tmp << 16); + } + + if (GET_LMASK64(T0) >= 3) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -3)); + T1 = (T1 & 0xFFFFFFFF00FFFFFFULL) | (tmp << 24); + } + + if (GET_LMASK64(T0) >= 4) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -4)); + T1 = (T1 & 0xFFFFFF00FFFFFFFFULL) | (tmp << 32); + } + + if (GET_LMASK64(T0) >= 5) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -5)); + T1 = (T1 & 0xFFFF00FFFFFFFFFFULL) | (tmp << 40); + } + + if (GET_LMASK64(T0) >= 6) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -6)); + T1 = (T1 & 0xFF00FFFFFFFFFFFFULL) | (tmp << 48); + } + + if (GET_LMASK64(T0) == 7) { + tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -7)); + T1 = (T1 & 0x00FFFFFFFFFFFFFFULL) | (tmp << 56); + } + RETURN(); } void glue(op_sdl, MEMSUFFIX) (void) { - target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7); - tmp = CALL_FROM_TB1(glue(do_sdl, MEMSUFFIX), tmp); - glue(stq, MEMSUFFIX)(T0 & ~7, tmp); + glue(stb, MEMSUFFIX)(T0, (uint8_t)(T1 >> 56)); + + if (GET_LMASK64(T0) <= 6) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 1), (uint8_t)(T1 >> 48)); + + if (GET_LMASK64(T0) <= 5) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 2), (uint8_t)(T1 >> 40)); + + if (GET_LMASK64(T0) <= 4) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 3), (uint8_t)(T1 >> 32)); + + if (GET_LMASK64(T0) <= 3) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 4), (uint8_t)(T1 >> 24)); + + if (GET_LMASK64(T0) <= 2) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 5), (uint8_t)(T1 >> 16)); + + if (GET_LMASK64(T0) <= 1) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 6), (uint8_t)(T1 >> 8)); + + if (GET_LMASK64(T0) <= 0) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 7), (uint8_t)T1); + RETURN(); } void glue(op_sdr, MEMSUFFIX) (void) { - target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7); - tmp = CALL_FROM_TB1(glue(do_sdr, MEMSUFFIX), tmp); - glue(stq, MEMSUFFIX)(T0 & ~7, tmp); + glue(stb, MEMSUFFIX)(T0, (uint8_t)T1); + + if (GET_LMASK64(T0) >= 1) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -1), (uint8_t)(T1 >> 8)); + + if (GET_LMASK64(T0) >= 2) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -2), (uint8_t)(T1 >> 16)); + + if (GET_LMASK64(T0) >= 3) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -3), (uint8_t)(T1 >> 24)); + + if (GET_LMASK64(T0) >= 4) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -4), (uint8_t)(T1 >> 32)); + + if (GET_LMASK64(T0) >= 5) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -5), (uint8_t)(T1 >> 40)); + + if (GET_LMASK64(T0) >= 6) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -6), (uint8_t)(T1 >> 48)); + + if (GET_LMASK64(T0) == 7) + glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -7), (uint8_t)(T1 >> 56)); + RETURN(); } diff --git a/target-mips/translate.c b/target-mips/translate.c index d3f80f2983..77499e83e5 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -889,7 +889,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt, case OPC_LDL: GEN_LOAD_REG_TN(T1, rt); op_ldst(ldl); - GEN_STORE_TN_REG(rt, T0); + GEN_STORE_TN_REG(rt, T1); opn = "ldl"; break; case OPC_SDL: @@ -900,7 +900,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt, case OPC_LDR: GEN_LOAD_REG_TN(T1, rt); op_ldst(ldr); - GEN_STORE_TN_REG(rt, T0); + GEN_STORE_TN_REG(rt, T1); opn = "ldr"; break; case OPC_SDR: @@ -952,7 +952,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt, case OPC_LWL: GEN_LOAD_REG_TN(T1, rt); op_ldst(lwl); - GEN_STORE_TN_REG(rt, T0); + GEN_STORE_TN_REG(rt, T1); opn = "lwl"; break; case OPC_SWL: @@ -963,7 +963,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt, case OPC_LWR: GEN_LOAD_REG_TN(T1, rt); op_ldst(lwr); - GEN_STORE_TN_REG(rt, T0); + GEN_STORE_TN_REG(rt, T1); opn = "lwr"; break; case OPC_SWR: |