diff options
author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-18 03:36:07 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-18 03:36:07 +0000 |
commit | c6d6dd7c74aaf8ca156d4589adff060078ec20ef (patch) | |
tree | 90ee5e7bfd3884d1541144ea1ef28712fa22c81e /target-mips | |
parent | 8c89395eebc4c88e35949b3310254f0d893379c5 (diff) |
Fix MIPS64 R2 instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3686 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
-rw-r--r-- | target-mips/op.c | 29 | ||||
-rw-r--r-- | target-mips/op_helper.c | 16 | ||||
-rw-r--r-- | target-mips/translate.c | 19 |
3 files changed, 34 insertions, 30 deletions
diff --git a/target-mips/op.c b/target-mips/op.c index 0ecc930819..ad619c9b46 100644 --- a/target-mips/op.c +++ b/target-mips/op.c @@ -683,8 +683,8 @@ void op_drotr (void) target_ulong tmp; if (T1) { - tmp = T0 << (0x40 - T1); - T0 = (T0 >> T1) | tmp; + tmp = T0 << (0x40 - T1); + T0 = (T0 >> T1) | tmp; } FORCE_RET(); } @@ -693,10 +693,8 @@ void op_drotr32 (void) { target_ulong tmp; - if (T1) { - tmp = T0 << (0x40 - (32 + T1)); - T0 = (T0 >> (32 + T1)) | tmp; - } + tmp = T0 << (0x40 - (32 + T1)); + T0 = (T0 >> (32 + T1)) | tmp; FORCE_RET(); } @@ -724,10 +722,10 @@ void op_drotrv (void) T0 &= 0x3F; if (T0) { - tmp = T1 << (0x40 - T0); - T0 = (T1 >> T0) | tmp; + tmp = T1 << (0x40 - T0); + T0 = (T1 >> T0) | tmp; } else - T0 = T1; + T0 = T1; FORCE_RET(); } @@ -3091,7 +3089,7 @@ void op_ext(void) unsigned int pos = PARAM1; unsigned int size = PARAM2; - T0 = ((uint32_t)T1 >> pos) & ((size < 32) ? ((1 << size) - 1) : ~0); + T0 = (int32_t)((T1 >> pos) & ((size < 32) ? ((1 << size) - 1) : ~0)); FORCE_RET(); } @@ -3101,13 +3099,13 @@ void op_ins(void) unsigned int size = PARAM2; target_ulong mask = ((size < 32) ? ((1 << size) - 1) : ~0) << pos; - T0 = (T0 & ~mask) | (((uint32_t)T1 << pos) & mask); + T0 = (int32_t)((T0 & ~mask) | ((T1 << pos) & mask)); FORCE_RET(); } void op_wsbh(void) { - T0 = ((T1 << 8) & ~0x00FF00FF) | ((T1 >> 8) & 0x00FF00FF); + T0 = (int32_t)(((T1 << 8) & ~0x00FF00FF) | ((T1 >> 8) & 0x00FF00FF)); FORCE_RET(); } @@ -3117,7 +3115,7 @@ void op_dext(void) unsigned int pos = PARAM1; unsigned int size = PARAM2; - T0 = (T1 >> pos) & ((size < 32) ? ((1 << size) - 1) : ~0); + T0 = (T1 >> pos) & ((size < 64) ? ((1ULL << size) - 1) : ~0ULL); FORCE_RET(); } @@ -3125,7 +3123,7 @@ void op_dins(void) { unsigned int pos = PARAM1; unsigned int size = PARAM2; - target_ulong mask = ((size < 32) ? ((1 << size) - 1) : ~0) << pos; + target_ulong mask = ((size < 64) ? ((1ULL << size) - 1) : ~0ULL) << pos; T0 = (T0 & ~mask) | ((T1 << pos) & mask); FORCE_RET(); @@ -3139,7 +3137,8 @@ void op_dsbh(void) void op_dshd(void) { - T0 = ((T1 << 16) & ~0x0000FFFF0000FFFFULL) | ((T1 >> 16) & 0x0000FFFF0000FFFFULL); + T1 = ((T1 << 16) & ~0x0000FFFF0000FFFFULL) | ((T1 >> 16) & 0x0000FFFF0000FFFFULL); + T0 = (T1 << 32) | (T1 >> 32); FORCE_RET(); } #endif diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 7d74efc45b..4391e551ba 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -106,8 +106,8 @@ void do_drotr (void) target_ulong tmp; if (T1) { - tmp = T0 << (0x40 - T1); - T0 = (T0 >> T1) | tmp; + tmp = T0 << (0x40 - T1); + T0 = (T0 >> T1) | tmp; } } @@ -115,10 +115,8 @@ void do_drotr32 (void) { target_ulong tmp; - if (T1) { - tmp = T0 << (0x40 - (32 + T1)); - T0 = (T0 >> (32 + T1)) | tmp; - } + tmp = T0 << (0x40 - (32 + T1)); + T0 = (T0 >> (32 + T1)) | tmp; } void do_dsllv (void) @@ -142,10 +140,10 @@ void do_drotrv (void) T0 &= 0x3F; if (T0) { - tmp = T1 << (0x40 - T0); - T0 = (T1 >> T0) | tmp; + tmp = T1 << (0x40 - T0); + T0 = (T1 >> T0) | tmp; } else - T0 = T1; + T0 = T1; } void do_dclo (void) diff --git a/target-mips/translate.c b/target-mips/translate.c index ac439d27a1..b3ae2ccfea 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1897,43 +1897,49 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt, goto fail; gen_op_ext(lsb, msb + 1); break; +#if defined(TARGET_MIPS64) case OPC_DEXTM: if (lsb + msb > 63) goto fail; - gen_op_ext(lsb, msb + 1 + 32); + gen_op_dext(lsb, msb + 1 + 32); break; case OPC_DEXTU: if (lsb + msb > 63) goto fail; - gen_op_ext(lsb + 32, msb + 1); + gen_op_dext(lsb + 32, msb + 1); break; case OPC_DEXT: - gen_op_ext(lsb, msb + 1); + if (lsb + msb > 63) + goto fail; + gen_op_dext(lsb, msb + 1); break; +#endif case OPC_INS: if (lsb > msb) goto fail; GEN_LOAD_REG_TN(T0, rt); gen_op_ins(lsb, msb - lsb + 1); break; +#if defined(TARGET_MIPS64) case OPC_DINSM: if (lsb > msb) goto fail; GEN_LOAD_REG_TN(T0, rt); - gen_op_ins(lsb, msb - lsb + 1 + 32); + gen_op_dins(lsb, msb - lsb + 1 + 32); break; case OPC_DINSU: if (lsb > msb) goto fail; GEN_LOAD_REG_TN(T0, rt); - gen_op_ins(lsb + 32, msb - lsb + 1); + gen_op_dins(lsb + 32, msb - lsb + 1); break; case OPC_DINS: if (lsb > msb) goto fail; GEN_LOAD_REG_TN(T0, rt); - gen_op_ins(lsb, msb - lsb + 1); + gen_op_dins(lsb, msb - lsb + 1); break; +#endif default: fail: MIPS_INVAL("bitops"); @@ -6156,6 +6162,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx) break; } GEN_STORE_TN_REG(rd, T0); + break; #endif default: /* Invalid */ MIPS_INVAL("special3"); |