diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-09 14:14:21 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-09 14:14:21 +0000 |
| commit | 62c5609aa537a9c7f3c70e4baa5e67060368baa3 (patch) | |
| tree | 4d97964618731f63c2fc7b01e99b2f43adc048bf /target-mips | |
| parent | 97428a4d84a22795e0d9f1517677ec01cb1bede1 (diff) | |
Catch unaligned sc/scd.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2642 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/op_mem.c | 8 | ||||
| -rw-r--r-- | target-mips/translate.c | 2 |
2 files changed, 10 insertions, 0 deletions
diff --git a/target-mips/op_mem.c b/target-mips/op_mem.c index a1991721ac..19373cf002 100644 --- a/target-mips/op_mem.c +++ b/target-mips/op_mem.c @@ -117,6 +117,10 @@ void glue(op_ll, MEMSUFFIX) (void) void glue(op_sc, MEMSUFFIX) (void) { CALL_FROM_TB0(dump_sc); + if (T0 & 0x3) { + env->CP0_BadVAddr = T0; + CALL_FROM_TB1(do_raise_exception, EXCP_AdES); + } if (T0 == env->CP0_LLAddr) { glue(stl, MEMSUFFIX)(T0, T1); T0 = 1; @@ -182,6 +186,10 @@ void glue(op_lld, MEMSUFFIX) (void) void glue(op_scd, MEMSUFFIX) (void) { CALL_FROM_TB0(dump_sc); + if (T0 & 0x7) { + env->CP0_BadVAddr = T0; + CALL_FROM_TB1(do_raise_exception, EXCP_AdES); + } if (T0 == env->CP0_LLAddr) { glue(stq, MEMSUFFIX)(T0, T1); T0 = 1; diff --git a/target-mips/translate.c b/target-mips/translate.c index 57527a5e96..e5eff065af 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -714,6 +714,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt, opn = "sd"; break; case OPC_SCD: + save_cpu_state(ctx, 1); GEN_LOAD_REG_TN(T1, rt); op_ldst(scd); opn = "scd"; @@ -812,6 +813,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt, opn = "ll"; break; case OPC_SC: + save_cpu_state(ctx, 1); GEN_LOAD_REG_TN(T1, rt); op_ldst(sc); GEN_STORE_TN_REG(rt, T0); |