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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-06-12 12:43:47 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-06-12 12:43:47 +0000 |
commit | bd04c6feb96fd750ab5d495523ad478f9c90db71 (patch) | |
tree | a4b74d0cc6f4d66ddb103f8eea0b53fdb18c9a53 /target-mips/translate_init.c | |
parent | 39524770b2a71f394b7e121def846608fc3e8f54 (diff) |
Change 20Kc PRID to a later version.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2980 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate_init.c')
-rw-r--r-- | target-mips/translate_init.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c index c5b27330ba..e576ef865a 100644 --- a/target-mips/translate_init.c +++ b/target-mips/translate_init.c @@ -182,7 +182,9 @@ static mips_def_t mips_defs[] = }, { .name = "20Kc", - .CP0_PRid = 0x00018200, + /* We emulate a later version of the 20Kc, earlier ones had a broken + WAIT instruction. */ + .CP0_PRid = 0x000182a0, .CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AT) | (1 << CP0C0_VI), .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (47 << CP0C1_MMU) | (2 << CP0C1_IS) | (4 << CP0C1_IL) | (3 << CP0C1_IA) | |