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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-30 20:46:02 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-30 20:46:02 +0000
commit51b2772f28f51b04e10e6e51f411f7246e1159d9 (patch)
tree46ac64740a6e04204a5e8285a715d5c564311b7f /target-mips/translate_init.c
parentfdf41d225e8c90f2822b4c706552e005837218a5 (diff)
Fix CPU (re-)selection on reset.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate_init.c')
-rw-r--r--target-mips/translate_init.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index 7d60f19b28..e14b7348c1 100644
--- a/target-mips/translate_init.c
+++ b/target-mips/translate_init.c
@@ -207,12 +207,14 @@ static void r4k_mmu_init (CPUMIPSState *env, mips_def_t *def)
int cpu_mips_register (CPUMIPSState *env, mips_def_t *def)
{
if (!def)
+ def = env->cpu_model;
+ if (!def)
cpu_abort(env, "Unable to find MIPS CPU definition\n");
+ env->cpu_model = def;
env->CP0_PRid = def->CP0_PRid;
-#ifdef TARGET_WORDS_BIGENDIAN
- env->CP0_Config0 = def->CP0_Config0 | (1 << CP0C0_BE);
-#else
env->CP0_Config0 = def->CP0_Config0;
+#ifdef TARGET_WORDS_BIGENDIAN
+ env->CP0_Config0 |= (1 << CP0C0_BE);
#endif
env->CP0_Config1 = def->CP0_Config1;
env->CP0_Config2 = def->CP0_Config2;