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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-12-06 17:42:40 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-12-06 17:42:40 +0000 |
| commit | 814b9a47490c4500fd105b524b8354764e6655e5 (patch) | |
| tree | 77b03656e085fd47513316bc1b4ea6969e1e0fb2 /target-mips/translate.c | |
| parent | ec2309289d39dcdfd1a766b945b46d8a0e0be3a4 (diff) | |
MIPS TLB performance improvements, by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index f5c3afdce0..0d624185f8 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -2430,6 +2430,7 @@ CPUMIPSState *cpu_mips_init (void) env->PC = 0xBFC00000; #if defined (MIPS_USES_R4K_TLB) env->CP0_random = MIPS_TLB_NB - 1; + env->tlb_in_use = MIPS_TLB_NB; #endif env->CP0_Wired = 0; env->CP0_Config0 = MIPS_CONFIG0; |