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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-12-16 16:45:18 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-12-16 16:45:18 +0000 |
| commit | 179e32bbccd0b7ae2fa99e6612d1657c3b8205ae (patch) | |
| tree | 3b346d6e275b86c7684a34852c5ec6b081546c90 /target-mips/translate.c | |
| parent | e4630047e161ac1b23bfd37b2c52785fce49400a (diff) | |
Fix erraneous fallthrough in MIPS trap implementation, thanks Atsushi Nemoto.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2247 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 64f7d75650..c9cbc9dadb 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1276,6 +1276,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc, GEN_LOAD_REG_TN(T1, rt); cond = 1; } + break; case OPC_TEQI: case OPC_TGEI: case OPC_TGEIU: |