diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-09 09:33:33 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-09 09:33:33 +0000 |
| commit | a6763a588127d8b0f7e64312e9153c6c6bae822f (patch) | |
| tree | bca17b21adf269ef2552351f9b4af2f3dd7cd6b6 /target-mips/translate.c | |
| parent | 204a1b8d5ec12af7f0e4757f51802672fc2e6681 (diff) | |
Fix MIPS64 address computation specialcase, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2793 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 6098b2a10b..debe17d7c6 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -719,7 +719,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt, } else { gen_op_load_gpr_T0(base); gen_op_set_T1(offset); - gen_op_add(); + gen_op_addr_add(); } /* Don't do NOP if destination is zero: we must perform the actual * memory access @@ -868,7 +868,7 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft, } else { gen_op_load_gpr_T0(base); gen_op_set_T1(offset); - gen_op_add(); + gen_op_addr_add(); } /* Don't do NOP if destination is zero: we must perform the actual * memory access |